Basic Arm9 Block Diagram 1x2cm

AR900 HomeBASE® ADSL Network Processor

OVERVIEW

FEATURES

The AR900 ADSL Network Processor is a member of the HomeBASE family of xDSL solutions designed for the customer premise equipment (E) market. The AR900 is a highly-integrated, monolithic, single-chip network processor designed to be at the heart of entry-level E modems. On the WAN side the AR900 connects to a SpeedREACH™ ADSL analog front end (AFE)/line driver combo, the AR8202. On the LAN side it provides multiple interfaces to either USB or Ethernet. The architecture of the AR900 allows the basic ADSL modem to be featured-enhanced to Ethernet, USB, VoIP, WLAN a multiport switch or a combination. The device is supplied with a comprehensive, preintegrated software suite based on the royalty free Linux OS.

• Complete digital circuitry of an ADSL E • ARM9 core with MMU to Linux • Complete with software stack configurable for bridging, routing and firewall including network address translation (NAT) between WAN and multiple LAN side interfaces • Zero copy data transport feature • G.dmt and G.lite compliant • s Annexes A and B • Up to 12? Mbps downstream data rate

DESCRIPTION

• Up to 1 Mbps upstream data rate

The AR900 comes in a 233-pin, PBGA package and provides all the digital circuitry of an ADSL modem. To address the cost issues associated with a high number of discrete components, LSI Logic has leveraged its System-on-aChip (SoC) leadership by integrating the key functional components described below.

• Interoperable with industry leading DSLAMs

The U Subsystem: The U is based on a Harvard Architecture ARM9 core that is closely coupled to an 8 K instruction set and 8 K data cache, and an enhanced memory management unit (MMU) for virtual memory , all running at 200MHz. The U handles all the routing/configuration and control operations. The subsystem also contains timers, a flexible interrupt controller, GPIO lines and a UART for supervisory purposes.

• Lowest BOM component count

• 10/100 Ethernet MAC and MII interface

BENEFITS • Integrated 200 MHz ARM922 processor • Integrated ADSL DMT engine • Integrated hardware-based ATM SAR • Integrated multi-port SDRAM controller • Integrated Ethernet MAC • Maximum vLow power consumption

/12 Control

/2

Clock and Reset Module

GPIO

Timer N Timer 1

/2

/16

/14

MIIM

10/100 Ethernet MAC

DMT Engine

APB

LAN Side Interface

Control

UART ARM922

/13

Control

ABM N way, Expandable AHB1 AHB2

Buffer Management Engine

WAN UTOPIA Side ATM SAR Interface Buffer Management Engine

APB Bridge

8k I JTAG Cache AHB @100 /ETM 8k D MHz Cache U Subsystem

• Modular architecture - multiple platforms

Control

200MHz, 100MHz, Block level Resets

@200MHz

• Multiple OS choices Linux™, VxWorks™, WinCE™

AHB Bus @ 100MHz

Boot ROM

ApVIC

System Interrupts

Control

Control

EBB /45

Figure 1: Block diagram of AR900

AHB1

AHB2

N port Arbiter (100MHz, 32 bit)

Bulk Memory Access SDRAM Controller (100MHz, 16 bit)

/37

AR900 HomeBASE® ADSL Network Processor Autonomous Buffer Manager (ABM): The ABM is a hardware based buffer allocation engine that accelerates packet transfer from WAN to LAN. Once initialized, the ABM handles all buffer allocation and de-allocation without any U overhead. Thus, the hardware acceleration ensures that packets can be transferred at wire-speed. Integrated ADSL DMT Engine: The DMT hardware engine (ADSL data pump), along with the software drivers, process the data at the DSL physical and transmission convergence layers according to the G.dmt and G.lite standards. Conversion from the physical layer to ATM cells and/or IP packets, and vice-versa, is done by the DMT as well. The integration of the DMT onto the network processor is essential in minimizing the total cost of the solution. ATM Segmentation and Reassembly (SAR) Engine: The ATM SAR function can perform autonomous segmentation and reassembly using hardwarebased VCI/VPI look-up and scatter/gather DMA in conjunction with the ABM. The SAR s AAL2 and AAL5 over ATM including full for ABR and CBR traffic. Up-to 128 virtual channels (VCs) can be ed. Multi-port SDRAM Controller: The SDRAM controller provides the network processor with access to high-bandwidth, high-capacity bulk memory. The external space is used as program and data storage space for the U, cell/packet storage space for the ATM SAR, and buffer memory for the Ethernet and USB cores. Each hardware engine is connected to the SDRAM via its own bus, allowing the SDRAM controller to service multiple memory requests simultaneously. The controller s a 16-bit data wide external memory interface, anabling connection to a single external 64-Mbit or larger SDRAM device. 10/100 “Hub-lite” Ethernet Controller: The network processor contains a single-port 10/100 Mbps dual-speed Hub-lite ethernet controller that is based on LSI Logic’s IEEE 802.3 compliant E110 MAC core. The Hub-lite function can perform autonomous transmission and reception of Ethernet in concert with the ABM. It also features a MII management controller. Through the MII interface the AR900 can interface to either the L80225 or the AR229 (Auto-MDIX) Ethernet PHYs from LSI Logic. Configurable External Bus Bridge (EBB): The processor features a proprietary external bus bridge (EBB) that handles the transport of data between on-chip peripherals and external storage devices like Flash or external peripheral devices like DSPs. The EBB is highly configurable and can USB, 802.11 and HPNA PHYs.

For more information please call:

LSI Logic Corporation North American Headquarters Milpitas, CA Tel: 866-574-5741

North America Milpitas, CA Tel: 1-408-490-8000 Fax: 1-408-490-8590 Quebec, Canada Tel: 1-514-426-5011 Fax: 1-514-426-7119

Europe European Headquarters United Kingdom Tel: 44-1344-413200 Fax: 44-1293-651119

Hong Kong Kowloon Tong, Hong Kong Tel: 852-2192-1789 Fax: 852-2511-6939

China Beijing, China Tele: 86-10-626-38296 Fax: 86-10-626-38322 Chengdu, China Tel: 86-28-667-8831 Fax: 86-28-667-8054

Japan Tokyo, Japan Tel: 81-3-5463-7821 Fax: 81-3-5463-7820

Korea Seoul, Korea Tele: 82-2-528-3400 Fax: 82-2-528-2250

HomeBASE, SpeedREACH and the LSI Logic logo are trademarks or ed trademarks of LSI Logic Corporation. All other brand and product names may be trademarks of their respective companies. LSI Logic Corporation reserves the right to make changes to any products and services herein at any time without notice. LSI Logic does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by LSI Logic; nor does the purchase, lease, or use of a product or service from LSI Logic convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of LSI Logic or of third parties. Copyright ©2003 by LSI Logic Corporation. All rights reserved.

Order No. R20085 1103.LR.W