Basics Of 8086 5h362k

Dr. Bore Gowda S B ECE Department Manipal Institute of Technology Manipal-576104

Introduction  What is computer ? Programmable electronic device that can store, retrieve, and process data.

or

A computer is a machine that manipulates data according to a list of instructions.  Classification of Computers (power and price) Personal computers Mainframes Supercomputers Dedicated controllers – Embedded controllers

Evolution of Computers  First generation (1939-1954) - vacuum tube Second generation (1954-1959) – transistor  Third generation (1959-1971) – IC  Fourth generation (1971-present) – microprocessor

Input Devices

Central Processing Unit (U)

Memory Devices

Output Devices

Computers organization What is Microprocessor? It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and provides results as output. The µP is the ‘brain of the microcomputer’ It is a single chip which is capable of  processing data  controlling all of the components which make up the microcomputer system µP used to sequence executions of instructions that is in memory µP Fetch , Decode , and Execute the instruction The internal architecture of the microprocessor is complex.

Intel 80x86 Processor Evolutions µps

Year

Transistor count

Clock (MHz)

Internal External Addre data Data bus ss bus bus

Memory

4004

1971

2250

0.108

4-bit

4-bit

--

---

8080

1974

6000

2-3

8-bit

8-bit

16-bit

64KB

8085

1976

6500

3-8

8-bit

8-bit

8086

1978

29000

5-10

16-bit

16-bit

16-bit 64KB 20-bit 1MB

8088

1979

29000

5-8

16-bit

8-bit

80286

1982

134000

8-12

32-bit

16-bit

80386

1985

275000

16-33

32-bit

32-bit

80486

1989

1.2million

25-100

32-bit

32-bit

Pentium

1993

3.1million

60-233

32-bit

64-bit

Pentium Pro

1995

5.5million

64-bit

Pentium II

1997

7.5million

150-200 32-bit 233-400 32-bit

Pentium III

1999

28.1million

550

32-bit

20-bit 1MB 24-bit 16MB 32-bit 4GB 32-bit 4GB 32-bit 4GB 36-bit 4GB

Micro Processor Unit Microprocessor Unit (MPU) typically contains • s: Temporary storage locations for program instruction or data. • The Arithmetic Logic unit (ALU): This part of the MPU performs both arithmetic and logical operations • Timing and Control Circuits: that keep all of the other parts of system (Regs, ALU, memory & I/O) working together in the right time sequence

What are microprocessor-based systems?  Microprocessor-based systems are electrical systems consisting of microprocessors, memories, I/O units, and other peripherals.  Microprocessors are the brains of the systems  Microprocessors access memories and other units through buses  The operations of microprocessors are controlled by instructions stored in memories

Microprocessor-Based System with Buses

Introduction to 8086  Released by Intel in 1978  Produced from 1978 to 1990s  A 16-bit microprocessor chip.  Max. U clock rate : 5 MHz to 10 MHz  Package: 40 pin DIP  The 8086 gave rise to the x86 architecture of Intel's future processors.  Common manufacturer(s): Intel, AMD, NEC, Fujitsu, Harris (Intersil), OKI, Siemens AG, Texas Instruments, Mitsubishi.

• 16-bit Arithmetic Logic Unit • 16-bit data bus •

20-bit address bus - 220 = 1,048,576 = 1 Mega

• It requires single phase clock with 33% duty cycle to provide internal timing.

8086 Architecture The 8086 has two parts, the Bus Interface Unit (BIU) and the Execution Unit (EU). • The BIU fetches instructions, reads and writes data, and computes the 20-bit address. • The EU decodes and executes the instructions using the 16bit ALU.

BIU

8086 Architecture

EU

Address bus (20 bits)

Execution Unit (EU)

AH

AL

BH

BL

CH

CL

DH

DL

General purpose

SP

Segment

BP SI DI

CS

Data bus (16 bits)

DS SS

ALU Data bus (16 bits)

ALU Flag



ES IP

Instruction Queue EU control

Bus control

External bus

1 2 3 4 5 6 Bus Interface Unit (BIU)

BIU Operation The BIU fetches instructions using the CS and IP, written CS:IP, to construct the 20-bit address. Data is fetched using a segment (usually the DS) An effective address (EA) computed by the EU depending on the addressing mode. Components in BIU  Segment  The instruction pointer  Address generation adder  Bus control logic  Instruction queue

EU Operation 1. Fetch an instruction from instruction queue 2.

According to the instruction, EU control logic generates control signals. (This process is also referred to as instruction decoding)

3. Depending on the control signal, EU performs one of the following operations:  An arithmetic operation  A logic operation  Storing a datum into a  Moving a datum from a  Changing flag

AH BH CH DH

AL BL CL DL SP BP SI DI

ALU Flag

General purpose

ALU Data bus (16 bits)

EU control

instruction 1011000101001010

Components in EU  Arithmetic logic unit(ALU)  Status and control flags  General-purpose s  Temporary-operand s

Instruction Queue and Pipelining • While the EU is decoding an instruction or executing an instruction which does not require use of the buses, the BIU fetches up to six instruction bytes for the following instructions. The BIU stores these prefetched bytes in a first-in—first-out set called a queue. • This prefetch-and-queue scheme greatly speeds up processing. • Except in the cases of JMP and CALL instructions, where the queue must be dumped and then reloaded starting from a new address. • Fetching the next instruction while the current instruction executes is called pipelining.

8086 Programming Model 16-bit s ES CS SS DS IP

BIU s (20 bit adder)

AX BX CX DX

AH BH CH DH

16 bit arithmetic

Stack Segment Data Segment Instruction Pointer AL BL CL DL

SP BP EU s

Extra Segment Code Segment

SI DI FLAGS

Accumulator Base Count Data Stack Pointer Base Pointer Source Index Destination Index

Flag  Flag contains information reflecting the current status of a microprocessor. It also contains information which controls the operation of the microprocessor.  Called as Program Status Word (PSW) 15

14

13

12

11

10

9

x

x

x

x

OF DF

IF

8

6

TF SF ZF

 Control Flags IF: DF: TF:

7

Interrupt enable flag Direction flag Trap flag

5

4

3

2

1

0

x

AF

x

PF

x

CF

 Status Flags CF: PF: AF: ZF: SF: OF:

Carry flag Parity flag Auxiliary carry flag Zero flag Sign flag Overflow flag

Memory Address Space and Data Organization  8086 has 20 – bit address bus, and it s 220 = 1,048,576 i.e. 1 Mbytes of external memory.  The memory of an 8086 is organized as 8bit words, not as 16-bit words.  An 8-bit data is stored in a location  A word i.e. 16-bit data is stored in two locations,  Lower byte is stored in lower address memory location  Higher byte is stored in higher address location

Segment s and Memory Segmentation in 8086 The addresses of the active segments are stored in the four internal segment s: CS, SS, DS, ES

15

0

CS

Code Segment

DS

Data Segment

SS

Stack Segment

ES

Extra Segment

Segment s and Memory Segmentation in 8086  In 8086 1 MB of physical memory is divided into 16 blocks of 64KB, out of these the 8086 defines four active 64KB memory blocks or segments.  A segment represents an independently addressable unit of memory consisting of 64K consecutive byte wide storage locations.  Each segment is assigned a base address that identifies its starting point.  Only four segments can be active at a time: Code segment  to store instructions code of a program Stack segment  to store stack of data using PUSH/POP Data segment  to store data bytes/words Extra segment  additional segment for storing data 4 LSBs of base address should be always 0H

Segment s and Memory Segmentation in 8086

DS: E000

CS: B300

SS: 7000

ES: 5D27

Segment s and Memory Segmentation in 8086 accessible segments can be set up to be contiguous, adjacent, or even overlapping.

Segment s and Memory Segmentation in 8086 Advantages of memory segmentation Allow the memory capacity to be 1Mb even though the addresses associated with the individual instructions are only 16 bits wide. Facilitate the use of separate memory areas for the program, its data and the stack. Permit a program and/or its data to be put into different areas of memory each time the program is executed. Multitasking becomes easy.

Instruction Pointer (IP)  The instruction pointer (IP) identifies the location of the next word of instruction code to be fetched from the current code segment of memory.  The offset in IP is combined with the current value in CS to generate the address of the instruction code.  During normal operation, the 8088 fetches instructions from the code segment of memory, stores them in its instruction queue, and executes them one after the other.

General Purpose s Data s Data s are used for temporary storage of frequently used intermediate results. The contents of the data s can be read, loaded, or modified through software. Each can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation. 15

Data Group

8 7

0

AX

AH

AL

Accumulator

BX

BH

BL

Base

CX

CH

CL

Counter

DX

DH

DL

Data

General Purpose s

General Purpose s Pointer and Index s 0

15

SP

Stack Pointer

BP

Base Pointer

SI

Source Index

DI

Destination Index

These four s must always be used for 16-bit operations

General Purpose s Pointer s

Index s

The pointer s are used to store offset addresses of memory location relative to the stack segment . Combining SP with the value in in SS (SS:SP) results in a 20-bit address that points to the top of the stack (TOS). BP is used to access data within the stack segment of memory.

The index are used to hold offset addresses for instructions that access data in the data segment. The source index (SI) is used for a source operand, and the destination index (DI) is used for a destination operand.

Generating Memory Addresses / Physical address Segment Defaults

Generating Memory Addresses / Physical address  8086 has 20 address pins, so each memory location connected will have 20-address, i.e. from 00000h to FFFFFh. The 20-bit actual address of memory locations is called physical address (PA).  Memory address / Physical address is obtained by adding the shifted value of base address in segment to Effective Address(EA). = Segment s X 10H + EA where EA = offset address + displacement(if any)

Generating Memory Addresses / Physical address If the content of code segment is 2500h and the content of IP is 0002H. What is the physical address of the instruction? Solution: [CS]=2500h---segment [IP]=0002h ---offset value EA= offset value + displacement EA=0002h+0 = 0002h PA=segment X 10h + EA PA=2500h X 10h + 0002h PA=25000h+0002h=25002h

Generating Memory Addresses / Physical address Calculate the memory address of the data in the instruction MOV AL, [5923h]. Assume that [ds]=7000h. PA= 7000h X 10h + 5923h = 70000h + 5923h = 75923h If MOV DL, 0Ah[SI], What is the address of data in the memory? Assume that [ds]=8500h, [si]=1234h EA= SI + 0Ah=1234h + 0Ah = 123Eh PA= DS X 10h + EA = 8500h X 10h + 123Eh = 85000h + 123Eh = 8623Eh

Generating Memory Addresses / Physical address Calculate the PA of the data in the instruction MOV AL, [SI][DI]10. Assume that [ds]=7000h, [SI]=0500h, [DI]=0012h. EA= SI + DI + 0Ah=0500h + 0012h + 0Ah = 051Ch PA= DS X 10h + EA = 7000h X 10h + 051Ch = 70000h + 051Ch = 7051Ch If ADD DL, [BP], What is the address of data in the memory? Assume that [SS]=3000h, [BP]=1234h EA= BP + 0=1234h + 0 = 1234h PA= SS X 10h + EA = 3000h X 10h + 1234h = 30000h + 1234h = 31234h

Addressing Modes  When a Microprocessor executes an instruction, it needs to know where to get data and where to store results. Such information is specified in the operand fields of the instruction.  An instruction acts on any number of operands. The way an instruction accesses its operands is called its Addressing modes  Operand is data on which microprocessor operates  Operands : in s, Memory, I/O ports, and within Instruction  Operands types • Implicit • Explicit • Both Implicit and Explicit

Classification of Addressing Modes 1. 2. 3. 4.

Implicit addressing mode Immediate addressing mode addressing mode Memory addressing modes a. Direct addressing mode b. Indirect addressing modes I. indirect addressing II. Indexed addressing III. Relative IV. Based indexed addressing V. Relative Based indexed addressing 5. I/O port addressing a. Fixed port addressing b. Variable port addressing

Addressing Modes 1. •

Implicit addressing The data value/data address is implicitly associated with the instruction. • In the instruction neither the source nor the destination is specified. Examples: DAA, AAA, STC, AAM 2. Immediate addressing • Operand is stored as part of the instruction • Appears in the form of successive byte or word • Resides in the code segment not in the data segment • faster to execute an instruction Examples: ADD AL, 25H SUB AX, 1200D MOV SI, 25H AND CH, 01110010B

Addressing Modes 3.

addressing mode

•

8-bit/16-bit data required for execution is stored in 8-bit/16bit s The names of s are specified in the instruction All the s except IP may be used in this mode

• •

Examples: MOV AL, BH ADD AX, BX MOV SI, DX AND BH, CL

Addressing Modes 4.

Memory addressing modes • Memory (RAM) is the main component of a computer to store temporary data and machine instructions. • In a program, programmers many times need to read from and write into memory locations. • 8-bit/16-bit data required for executing the instruction is present in the memory location. a. Direct addressing • 16-bit offset address of the memory location is specified directly in the instruction as a part of it Examples:

MOV AL, [1500H]

ADD AL, ES:[3400H]

Addressing Modes 4. Memory addressing modes (Contd…) b. Indirect addressing mode I. indirect addressing mode • Offset address of memory location is specified in the [BX] or [SI] or [DI] • The default segment is either DS or ES Offset Address = [BX] / [SI] / [DI] Examples: MOV CX, [SI]

ADD AH, [BX]

Addressing Modes 4. Memory addressing modes (Contd…) II. Indexed addressing mode • •

Offset of the operand is stored in one of the index s DS or ES are the default segments for index s SI and DI respectively Effective Address = [SI] / [DI] Examples: MOV DL, [SI] ADD BH, [DI]

Addressing Modes 4. Memory addressing modes (Contd…) III. Relative addressing mode •Data is available at an effective address formed by adding an 8-bit or 16-bit displacement with content of any s Effective Address = [SI] / [DI] / [BX] / [BP] + 8/16-bit displacement Examples: ADD DL, 99h[DI] or ADD DL, [99h+DI] MOV AH, ES:6500h[SI]

Addressing Modes 4. Memory addressing modes (Contd…) IV. Based Indexd addressing mode •

Effective address of the memory location is obtained by adding base content i.e. [BX] or [BP] to the index i.e. [SI] or [DI] Effective Address = [BX] / [BP] + [SI] / [DI] Examples: MOV DL, [SI][BX] or

MOV DL, [SI+BX]

Addressing Modes 4. Memory addressing modes (Contd…) V. Relative Based Indexed addressing mode • Effective address of the memory location is obtained by adding base content i.e. [BX] or [BP], index i.e. [SI] or [DI] along with 8/16-bit displacement Effective Address = [BX] / [BP] + [SI] / [DI] + 8/16-bit displacement Examples: MOV DL, 12h[SI][BX] [SI+BX+12h]

or

MOV DL,

Addressing Modes 5. I/O port addressing  8086 can be interfaced to 8/16-bit I/O devices using either I/O mapped I/O or memory-mapped I/O.  I/O mapped I/O uses the instructions IN and OUT  8086 can transfer 8/16-bit data to or from a peripheral device  All I/O transfer between the 8086 and the peripheral devices take place via AL for 8-bit ports and AX for 16-bit ports.  The I/O port addressing can be done either directly or indirectly as follows: a. Direct port addressing b. Indirect port addressing

Addressing Modes 5. a. • •

I/O port addressing Direct port addressing/Fixed port addressing In this mode 8-bit port address is part of an instruction It is also called as fixed port addressing, because the port address is constant. IN AL,75h or IN AX, 78h OUT 23h, AL or OUT FAh, AX b. Indirect port addressing/ Variable port addressing • In this port addressing, the 16-bit port address is specified in DX • It is also called as variable port addressing, because the program instructions can able to change port address in DX IN AL, DX or IN AX, DX OUT DX, AL or OUT DX, AX

Instruction Format  General Format of Instructions Label: Opcode Operand1, Operand2

; Comment

 Label: It is optional. It provides a symbolic address that can be used in branch instructions  Opcode: It specifies the type of instructions  Operands: Instructions of 80x86 family can have one, two, or zero operand. If the instruction has two operands, they must be separated by comma  Comments: Only for programmers’ reference

Instruction Set of 8086 Based on the type of the operation performed, the 8086 instructions are classified into following groups Data transfer instructions Arithmetic instructions Branch instructions Logical instructions Shift and Rotate instructions String instructions Processor control instructions Subroutine and Interrupt Instructions

Data transfer instructions MOV: XCHG: LEA: LDS: LES: XLAT: PUSH: PUSHF: POP: POPF: IN: OUT: SAHF: LAHF:

Move to/from /memory Exchange byte or word Load effective address Load pointer using data segment Load pointer using extra segment Translate byte Push word onto stack Push flags onto stack Pop word off stack Pop flags off stack Input byte or word from port Output byte or word to port Store AH into flags Load AH from flags

ing parameters to procedures Types: 1.In s 2.In memory locations 3.With pointers possessed in s 4.With the stack

ing parameters to procedures Types: 1.Using s 2.Using memory locations 3.Using pointers 4.Using stack

ing parameters using s Program to convert the given 2-digit Hex number to ASCII .model small .stack 20 .data Hex_Num DB 3Fh Asc DB ?, ? .code Start:

MOV AX, @DATA MOV DS, AX MOV AL, Hex_Num CALL CONV MOV ASC, AL MOV AL, Hex_Num MOV CL, 4 ROR AL, CL CALL CONV MOV ASC+1, AL INT 3

CONV

PROC NEAR AND AL, OFH CMP AL, 0AH JC ADD30 ADD AL, 07 ADD30: ADD AL, 30H RET CONV ENDP END Start

ing parameters using Memory location Program to check whether the given byte is bitwise palindrome or not .model small .stack 20 .data Num DB 3Fh Res DW ? .code MOV AX, @DATA MOV DS, AX CALL Check INT 3

Start:

Check

PROC NEAR MOV CX, 8 MOV AL, Num MOV BL, 0 UP: ROR AL, 1 RLC BL, 1

Exit: Check

LOOP UP MOV Res, 5555H CMP BL, NUM JE Exit MOV Res, 0AAAAH RET ENDP END Start

ing parameters using Pointers Program to convert 2-digit BCD number to Hex

Start:

.model small .stack 20 .data BCD_Num DB 3Fh Hex_Num DW ? .code MOV AX, @DATA MOV DS, AX LEA SI, BCD_Num LEA DI, Hex_Num CALL BCD_to_HEX INT 3

BCD_to_HEX

Check

PROC NEAR MOV AL, [SI] MOV BL, AL AND BL, 0FH MOV CL, 4 ROR AL, CL AND AL, 0FH MOV DL, 0AH MUL DL ADD AL, BL MOV [DI], AL RET ENDP END Start

ing parameters using stack Program to find square of 8-bit unsigned number

Start:

.model small .stack 20 .data Num DB 3Fh Res DW ? .code MOV AX, @DATA MOV DS, AX MOV BL, Num MOV BH, 0 PUSH BX CALL Square POP BX MOV Res, BX INT 3

Square

Square

PROC NEAR POP AX MUL AL PUSH AX RET ENDP END Start