Cheatsheet 3d4dy

vD =

+ 1)

D G

VD

VD

ID ≈ IS e nVT ID ≈ −IS

iD = triode:

VD = VD0

ID > 0

D G

S

iD cutoff:

1 2

S

vGS > Vthn , vDS ≤ vGS − Vthn : � � 2 vDS = kn� · W L (vGS − Vthn ) · vDS − 2

G

D G

B

)&'(#

)*$+#

D

common source Rwith Rvs sig

G

S

S

saturation: 1 2

·

vGS < Vthn , kn�

·

W L

2

(vGS − Vthn ) · (1 + λ · vDS )

D

cutoff:

ro

vGS > Vthn :

iD = 0

S

W W ˜ (V�GS W Vth ) ˜ (1 O ˜ VDS )2 · ID | P p ˜ Cox ˜ ˜ (VGS Vthn ) L L kn gm = · n · VOV =

P p ˜ Cox ˜

gm

2 ˜ ID VGS Vthn =

L

gm

ro

�

2 ˜ P n ˜ Cox ˜

1 O ˜ I Dc

|

2 · kn� ·

VOV

W L

· ID

1 W r˜ IoD = ˜ (1 O ˜ VDS � ) L λ · ID

� I1D =

O ˜ ID

ID 1 + λ · VIDS c D

| 2 ˜ P n ˜ Cox ˜

! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! ! !

in

Rin = RG

!&'%

()&*%

Avo

"#$%&'!&%!

D

ro

-

g mb ˜ vbs

S

B

+ vbs

-

%#&'

%

%)*+'

%

! ' Elementary Configurations: Small Signal Analysis

%

!)*+'

#&

' small signal analysis of a few ' To allow fast analysis of circuits, it is good to the important elementary configurations.

1 R gm

AC

ro

R

f

O

AC

R r0 g m ˜ R ˜ r0

0

AC

Unless specifically stated otherwise, in this course we will assume B is connected to S. As a result, vbs = 0, and we can simply use the models discussed earlier that do not include the body effect.

g m ˜ vgs

!"#$'

%('

%

AC

AC

As mentioned before, the MOSFET is really a 4-terminal device. When B is not connected to S, the source-body voltage impacts the effective threshold voltage. For small signals, this results in the modified equivalent model shown below (the same for both nMOS and pMOS). The derivation of these models can be found in the textbook.

+

Rin = RG 1 Ro = gm g m ro Av o = 1 + g m ro

("#$% (&'%

AC

1 gm

Body effect

vgs

vout

g m ˜ ro1 // ro 2 1 g m ˜ ro1 // ro 2

!+%

ID 1 O ˜ VDS

G

common drain (source follower)

!"#

%$W ˜ ID L

1 W ˜ P n ˜ Cox ˜ ˜ (VGS Vthn ) 2 2 L

!"#$%&'%$'

!"#

Ro = R D g m Rd Av o = − 1 + g m RS

vDS ≤ vGS − Vthn :

triode:

mosfet small signal

!$%#

)$%#

vS

S

vGS < Vthn , vDS ≥ vGS − Vthn : � � The small signal model is exactly the same as that for the PMOS. You can derive this yourself. 2 vDS iD = kn� · W L (vGS − Vthn ) · vDS − 2

gm

!&'(#

)"#$% !&%

iD

forward bias only

g m ˜ v gs

!'(%

)'(%

D

forward or reverse bias

+

Av o = g m R D

!"#$% )*'+%

vGS < Vthn :

iD =

v gs

Av o = −gm · (ro ||RD )

vGS > Vthn , vDS ≥ vGS − Vthn : 2 · kn� · W L (vGS − Vthn ) · (1 + λ · vDS )

pmos large signal model

Small signals (NMOS)

G

1 gm R o = RD

Rin =

Ro = ro ||RD

iD = 0

small signal model To be a small signal, |vD | � 2nVT .

common gate Rin = RG

iD

saturation:

large signal model VD < VD0

G

S

v D � VT vD � −VT

ID = 0

D

B

iD = IS (e nVT − 1)

nVT ID + IS nVT rd ≈ ID

common source

nmos large signal model

nVT ln( iIDS

rd =

mosfet amplifiers

mosfets

diodes

(a)

(b)

ECE120, Winter 2010

(c)

R

R

AC

AC

(d)

(e)

5 - 12