Linear And Digital Integrated Circuits 1633

EI332-LINEAR & DIGITAL INTEGRATED CIRCUITS UNIT –1 FABRICATION OF INTEGRATED CIRCUITS 1.What is an integrated circuit? The integrated circuit or IC is a miniature , low cost electronic circuit consisting of active and ive components that are irreparably ed together on a single crystal chip of silicon. 2.List the advantages of • • • • • • •

IC over discrete component circuit. Miniature and hence increased equipment density. Cost reduction due to batch processing Increased system reliability due to the elimination of soldered ts. Improved functional performance Matched devices Increased operating speeds Reduction in power consumption.

3.Broadly classify IC’s. • •

Digital ICs Linear ICs

4.Show the classification of ICs. Integrated circuits Monolithic circuits Bipolar

P-n junction isolation

Hybrid circuits

Unipolar

Dielectric isolation

MOSFET

JFET

5.What is a monolithic circuit? It means a circuit fabricated from a single stone or a single crystal. 6.What are the 4 distinct layers if IC? Layer no.1(r 400 µ m), is a P-type silicon substrate upon which the IC is fabricated. Layer no.2(r 5-25µ m), is a thin n-type material grown as a single crystal extensin of the substrate using epitaxial deposition techniques.All active and ive components are fabricated within this layer using selective diffusion of impurities.

Layer no.3(0.02-2µ m), is a very thin Sio2 layer for preventing diffusion of impurities wherever not required using photo lithographic technique. Layer no.4(r 1µ m), is an aluminium layer used for obtaining interconnection between components.

7.What are the basic processes used to fabricate ICs using planar technology? o o o o o o o o o

Silicon wafer(substrate)preparation Epitaxial growth Oxidation Photolithography Diffusion Ion implantation Isolation technique Metallization Assembly processing and packaging

8.List out the steps used in the preparation of si-wafers.     

Crystal growth and doping Ingot trimming and grinding Ingot slicing Wafer polishing and etching Wafer cleaning

9.Write the basic chemical reaction used for the epitaxial growth of pure silicon. The basic chemical reaction used for the epitaxial growth of pure silicon is the hydrogen reduction of silicon tetrachloride. o 1200 c SiCl4 + 2H2 Si + 4HCl 10.What are the 2 important properties of Sio2? Sio2 has the property of preventing the diffusion of almost all impurities through it.It serves 2 very important purposes.  Sio2 is an extremely hard protective coating and unaffected by almost all reagents except by HCl.Thus it stands against any contamination.  By selective etching of Sio2 ,diffusion of impurities through carefully defined windows in the Sio2 can be accomplished to fabricate various components. 11.Why is the oxidation process called the thermal oxidation? Because high temperature is used to grow the oxide layer. 12.What are the 2 process involved in photolithography?  Photographic mask  Photo etching 13.What is the main purpose of photoetching? Used for the removal of Sio2 from desired regions so that the desired impurities can be diffused.

14.Name the technologies used for the fabricators or ICs  Monolithic technology  Hybrid technology 15.Explain the word “Epitaxy”. It means arranging atoms in single crystal fashion upon a single crystal substrate,so that the resulting layer is an extension of the substrate crystal structure. 16.Explain the process of oxidation. The silicon wafers are stacked up in a quqrtz boat and then inserted into quartz furnace tube.The Si-wafers are raised to a high temperature in the range of 950 to 1150oC and at the same time,exposed to a gas containing O2 or H2O or both.The chemical reaction is Si + 2H20

SiO2 + 2H2

17.What are the 2 advantages of ion implantation technique? • •

It is performed at low temperature.Therefore previously diffused regions have a lesser tendency for lateral spreading. In diffusion process ,temperature has to be controlled over a large area inside the oven,whereas in ion implantation technique,accelerating potential and the beam content are dielectrically controlled from outside.

18.List any 2 isolation techniques. • P-n junction isolation • Dielectric isolation 19.Write short notes on dielectric isolation. In dielectric isolation, a layer of solid dielectric such as silicon di oxide or ruby completely surrounds each component, thereby producing isolation ,both electrical and physical.This isolation dielectric layer is thick enough so that its associated capacitance is negligible.Also,it is possible to fabricate both p-n-p and n-p-n transistor within the same silicon substrate. 20.Mention the use of dielectric isolation Used for fabricating professional grade ICs required for specialized applications viz.aerospace and military,where higher cost is justified by superior performance. 21.What is metallization? The process to produce a thin metal film layer that will serve to make interconnection of the various components on the chip. 22.What are the main advantages of using aluminium for metallization? o It is relatively a good conductor o It is easy to deposit aluminium films using vacuum deposition. o Aluminium makes good mechanical bonds with silicon.

o Aluminium forms low resistance,non-rectifying with p-type silicon and the heavily doped n-type silicon. 23.Name the 3 different package configurations.  T 0.5 glass metal package  Ceramic flat package  Dual in line(ceramic or plastic type) 24.What are the various steps involved in the fabrication of a typical circuit? • Wafer preparation • Epitaxial growth • Oxidation • Isolation diffusion • Base diffusion • Emitter diffusion • Aluminium metallization 25.What are the various devices which constitute a monolithic circuit?  Transistors  Diodes  Resistors  Capacitors  Inductors 26.What is the main structural difference that makes integrated transistor poorer than discrete transistor? The structural difference makes an integrated transistor poorer than discrete transistor in 2 ways:  Collector being at the top increases the collector current path thereby increasing the collector series resistance and non-Vce(sat)of the device.  In the integrated transistor ,additional parasitic capacitance appears between collector and substrate as substrate is held at negative potential. 27.Explain why buried layer is used? The higher collector series resistance of an integrated transistor can be easily reduced by a process known as “ buried layer”.In this, heavily doped n+ region is sandwiched between the n-type epitaxial collector and p-type substrate. This buried n+ region provides a low resistivity current path from the active collector region(n type layer) to the collector constant(n+ layer).In effect, the n+ layer shunts the n-layer of the collector region w.r.t the flow of the current thus effectively reducing the collector resistance. 28.What are the different ways of integrating p-n-p transistors? • Vertical or substrate p-n-p • Lateral p-n-p • Triple diffused p-n-p

29.Write shot notes on vertical p-n-p transistors. The p-type substrate itself is used as p-collectors n-epitaxial layer for the base and the next p-diffusion(base in n-p-n structure)as the emitter region. This type of p-n-p transistor has the

limitation that collector has to be held at the most negative potential in the circuit for providing good isolation. 30.What is a triple diffused p-n-p transistor? If to a standard n-p-n transistor, an extra p-type diffusion is added after the n-diffusion, it is quite possible to obtain a p-n-p transistor and is known as triple diffused p-n-p transistors. 31.Why is n-p-n transistor preferred in integrated circuits over p-n-p transistor?  A vertical p-n-p transistor has the disadvantage that its collector has to be held at a fixed negative voltage.  Lateral p-n-p transistor has inferior characteristic as the base width is usually larger controlled by lateral diffusion of p-type impurities and photolithographic limitations during mask making and alignment.  The diffusion coefficient of the collector impurities should be as small as possible to avoid the movement of the collector impurities should be as small as possible to avoid the movement of the collector function.Since n-type impurities have smaller diffusion constant than p-type impurities,then n-type collector moves very little while p-type moves appreciably.This makes the n-p-n transistor superior in performance with relatively easier process control. 32.What are the different methods available for fabrication of integrated resistors? o Diffused resistor o Epitaxial resistor o Pinched resistor o Thin film resistor 33.Mention the advantages of thin film resistors over the diffused resistors.  Thin film resistors have lesser and smaller parasitic components and hence their high frequency behaviour is better.  The values of thin film resistors can be easily adjusted after fabrication by cutting a part of the resistor with a laser beam.  Thin film resistors have low temperature coefficient thereby making them more stable. 34.What are the 2 common methods for obtaining integrated capacitors?  Junction capacitor  MOS and thin film capacitor 35.Explain the process of JFET fabrication. The basic process used are the same as in BJT fabrication.The epitaxial layer which formed the collector of the BJT is used as the n-channel of the JFET.The p+ gate is formed in the nchannel by the process of diffusion or ion implantation.The n+ regions have been formed under the drain and source regions to provide good ohmic .

36.What are silicon gate MOS transistors? Polycrystallane silicon when doped with phosphorous is conductive and is used as the gate electrode instead of aluminium.This reduces VT to about 1 to 2V.Such device are called silicon gate MOS transistors. 37.Compare thick and thin film technologies. Thick film ICs are made by the process of screen printing,usually silk screening technique, whereas the materials used to make thin film are generally deposited onto substrates in a vacuum chamber. Nevertheless, thick film technology produces cheap and rugged resistors ,capacitors and conducting patterns the processing equipment for thick film circuit is relatively inexpensive and easy to use.Thin film technology provides greater precision in manufacturing but is more costly than thick film technology. 38.What are the various methods used for deposition of thin film? o Vacuum evaporation o Sputtering o Gas plating o Electro plating o Electroless plating o Silk screening 39.What are the 2 types of plating technique?  Electro plating  Electroless plating

40.List out some basic thick film processes.  Screen printing  Ceramic firing 41.What is an ohmic ? Aluminium used for making interconnection is a p-type impurity in silicon.The formation of rectifying p-n junction is avoided by making n+ diffusions in the n- regions where is to be made using aluminium.Such s are called ohmic s. 42.Mention the advantages of polysilicon gate MOSFET over aluminium gate.  It lowers VT  It reduces capacitances due to self-aligning property. 43.Explain why inductors are difficult to fabricate in ICs. Because IC devices are 2 dimensional.IC inductors can be made in the form of flat metallic thin film spirals by successive deposition of conduction patterns. Very small value of inductance of the order of nano-henry with low quality factor can be obtained. For any reasonable inductance value, a 3 dimensional coil structure is needed to obtain a large number of turns. 44.How the use of inductor are avoided? By simulating the circuits using RC active networks. 45.What are the advantages of MBE(Molecular Beam Epitaxy) over CVD(Chemical Vapour Deposition)

• Low Temperature processing –minimises autodoping and out diffusion • Precise control of doping • Complicated doping profiles can be generated • A wider choice of dopants can be used. 46.What is Reactive plasma etching The term reactive plasma is meant to describe a discharge in which ionization and fragment of gases takes place and produce chemically active species.Such plasmas are reactive both in the gas phase and solid surfaces exposed to them.When these interactions are used to form volatile products so that material is etched from surfaces that are not masked by lithographic patterns,this technique is known as reactive plasma etching 47.What are the reactive plasma etching techniques. • Plasma etchers and Barrel Reactors • Reactive Ion Etching • Reactive Ion Beam Etching

• Micro wave plasma etching 48.Define throughput of the process Number of wafers etched per unit time 49.Define diffusion in a solid It can be defined as atomic movement of diffusant in the crystal lattice by Vacancies or self interstitials.

50.Define diffusion by a vacancy A host atom acquires sufficient energy to leave the lattice site ,becoming a self interstitial atom and creating a vacancy.When a neighbouring atom moves to this vacancy site it is diffusion by vacancy 51.Define double vacancy or divacancy To produce impurity atom movement rather than oscillating between the two lattice sites by exchanging positions with a vacancy ,the vacancy has to diffuse away from the site that the impurity atom has just occupied or the impurity atom has to move to a second vacancy that is at the nearest of neighbouring of original vacancy.This is double vacancy or divacancy 52.What is interstitial diffusion mechanism. An interstitial atom moving from one place to another without occupying a lattice site is interstitial diffusion mechanism. 53.What are the techniques used to study the diffusion of As and Sb in SiO2 SIMS-Secondary Ion Mass Spectrometry RIBS-Rutherford Back Sputtering 54.Define Sputtering. It is the ejection of material from a surface caused by bombardment by energetic ions such as Ar+ and Xe + .

UNIT II

LINEAR INTEGRATED CIRCUITS 1.What is an op-amp? It is a special type of amplifier that, by proper selection of its external components could be configured for a variety of operations such as amplification, addition, subtraction and integration.

2.The basic building block of an op-amp is differential amplifier. 3.Define input offset voltage. It is the voltage that must be applied between the input terminals of the op-amp to nullify the output voltage.

4.Define slew rate. It is defined as the maximum rate of change of output caused by a step input voltage. 5.What is CMRR (Common Mode Rejection Ratio) and write its expression? The relative sensitivity of an op-amp to a difference signal as compared to common mode signal is called CMRR and gives the figure of merit P for the differential amplifier, where p=Ad| |Ac| Common Mode Rejection Ratio = Differential gain Common mode gain 6.Mention the various stages in an op-amp. The first 2 stages are differential amplifiers, third stage is buffer and level translator and the last stage is the output device.

7.If f0 is the peak frequency of the op-amp,’A’ is its open loop gain.’B’ is the factor then what is the bandwidth of the amplifier with ? Bandwidth = f0(1+AB) 8.Why are FET op-amps better than BJT op-amps? Because FET op-amps has high input resistance, high slow rate and low input offset current. 9.What is compensated op-amp? Op-amp which is internally compensated with the compensating network is designed in circuit to control the gain and phase shift of the op-amp.

the

10.Define unity gain bandwidth of an op-amp. The frequency at which the gain is equal to one is called unity gain bandwidth.

11.When does the op-amp behaves as a switch? When op-amp is operating in open loop mode it acts as a switch. Consider 2 signals V1 and V2 applied at both inverting and non-inverting terminal respectively. Since the gain of the op-amp is infinite, the output V0 is either at its positive saturation voltage(+Vsat) or negative saturation voltage (Vsat) as V1 > V2 or V2 – V1 respectively. Therefore amplifier acts as a switch. 12.Derive the expression of closed loop gain of an inverting amplifier. Writing the nodal equation at node ‘a’ Va – Vi + Va- V0 = 0 R1 Rf where Va is the voltage at node ‘a’.Since node ‘a’ is at virtual ground Va=0 ACL = V0 = -Rf Vi Ri 13.What is an inverting amplifier? A signal is applied to the inverting input terminal.The output voltage is to the inverting input terminal through Rf-R1 network.The output signal is the amplifier form of input signal with a phase shift of 1800.Such a circuit is called an inverting amplifier. 14.What is a non-inverting amplifier? If the signal is applied to the non-inverting input terminal and the output is , the circuit amplifies without inverting the input signal. Such a circuit is called a non-inverting amplifier. 15. What is linear op-amp circuit? An op-amp circuit which has the output signal with the same shape as the input signal is called linear op-amp circuit. At no time during the cycle,does the op-amp goes into saturation. 16.List out some linear op-amp circuit. • Inverting amplifier • Non-inverting amplifier • Differential amplifier • Instrumentation amplifiers • Current boosters • Controlled current sources • Automatic gain control circuits.

17. What is non-linear op-amp circuit? An op-amp circuit which has the output signal with the different shape from the input signal is called non-linear op-amp circuit.During a part of input cycle, the op-amp saturates. 18. List out some non-linear op-amp circuit.  Comparators  Wave shapers

19.How is the gain stabilized by negative ? Negative is used mainly to stabilize the overall voltage gain.If the open loop voltage gain AOL increases for any reason,the output voltage will increase and feeds back more voltage to the inverting input.Ths opposing voltage reduces V2.Therefore , eventhough it has increased, V2 has decreased and the final output increases much less than it would be without the negative . 20.What is a voltage follower? The circuit in which the output voltage follows the input voltage both in magnitude and phase is called as the voltage follower circuit. 21.What is a differentiator? A differentiator is an op-amp circuit which differentiates the input signal ie the output waveform is the derivative of the input waveform. 22.What are the main drawbacks of ideal differentiator? • At high frequency,a differentiators may become unstable and break into oscillation. • The input impedence ie(1/ωC1) decreases with increase in frequency,thereby making the circuit sensitive to high frequency noise. 23.What are the steps to be followed while deg a good differentiator?  Choose fa equal to highest frequency of the input signal. Assume a practical value of C1(<1µF)and then calculate Rf.  Choose fb=10fa(Say).Now calculate the values of R1 and C1 so that R1C1 = RfCf. 24.What are the main applications of differentiator? • It is used in wave shaping circuits to detect the frequency in an input signal. • It is also used as rate of change detector in modulations. 25.What is an integrator circuit? How is it obtained? An op-amp circuit which produces an output signal which is an integral of input signal is called as integrator circuit. It is obtained by simply interchanging resistor and capacitor of differentiator circuit.

26. What are the main drawbacks of ideal integrator circuit? • At low frequencies such as dc( ω ≈ 0 ) the gain becomes infinite. • When the op-amp saturates ie the capacitor is fully charged it behaves like an open circuit. 27.Why is the practical integrator circuit called lossy integrator? The gain of an integrator at a low frequency ( dc) can be limited to avoid the saturation problem.If the capacitor is shunted by a resistance Rf The parallel combination of Rf and Cf behaves like parallel capacitor,which dissipates power unlike an ideal capacitor.For this reason,this circuit is called as lossy integrator.

28.Why is an amplifier also called an error amplifier? An amplifier also called an error amplifier in control theory , which accepts the signal Xd and yields the output signal. X0=a.Xd where a is the forward gain of the amplifier is called the open-loop gain of the circuit. 29.What is precision diode? • When the input signal Vi > Vr / AOL then the output VOA,the output of op-amp exceeds Vr and the diode D conducts. • When the input signals Vi is less or negative than the Vr / AOL, the diode D is off and no current is delivered to the load RL except for small bias current of the op-amp and the reverse saturation current of the diode.This circuit is called precision diode capable of rectifying input signals of order of mV. 30.Give the output voltage when Vi is positive and negative in a precision diode. When Vi is positive,diode D1 conducts causing V0 to negative by one diode drop (Vr =0.6v).Hence,diode D2 is reverse biased.The output voltage V0 is zero. When Vi is negative ie Vi < 0, diode D2 conducts D1 is off.The negative input Vi forces the op-amp circuit VON positive and causes D2 to conduct.Output V0 becomes positive. 31. What are the main drawbacks of basic log op-amp circuit? The main drawbacks of log op-amp circuit is that,the emitter saturation current Is varies from transistor to transistor and with temperature.Thus a stable reference Vref cannot be obtained. 32.To implement analog multipliers, logarithmic amplifiers and antilogarithmic amplifiers are required. 33.What are function generators? Function generators are circuits, which are used to provide the basic waveform with minimum number of external components. 34.VCO (Voltage Controlled Oscillator) is the heart of function generator. 35.List out the normally available function generator. • ICL 8038 waveform generator

• XR – 2206 function generator 36.What is a comparator? It is a circuit, which compares a signal voltage applied at one input of an op-amp with output ±Vsat ( = VCC ). 37.What are the 2 types of comparators? • Non-inverting comparator • Inverting comparator

38.List out the applications of comparator. • Zero crossing detector • Window detector • Time marker generator • Phase meter 39. What are the main drawbacks of zero crossing detector? • The ouput V0 may not switch quickly from one saturation voltage to the other. • Because of the noise at the op-amps input terminals the output fluctuates, detecting zero reference crossing for noise voltage as well as Vin. 40.Explain the principle of operation of a phase detector. In phase detector ,both the input voltage are converted into spikes and the time interval between the pulse spikes of one input and that of the other is measured.The time interval is proportional to the phase difference.One can measure phase angles from 00 to 3600 with such a circuit. 41.What is Schmitt trigger? It is an inverting comparator with positive .This circuit convert an irregular shaped waveform to a square wave or pulse.This circuit is called as squaring circuit. 42. What is hysteresis width? It is the difference between the upper threshold voltage(VUT) and lower threshold voltage(VLT). VH = VUT - VLT = 2R2Vsat R1 + R2 43.What are the important characteristics of comparator? • Speed of operation • Accuracy • Compatibility of output 44.What are the 2 types of multivibrators? • Monostable multivibrator • Astable multivibrator 45.In astable multivibrator,both the states are quasi-stable.

46.Monostable multivibrator (one shot multivibrator) has one stable state and the other is quasi stable state. 47.Why is the monostable multivibrator circuit called time delay circuit and gating circuit? Because it generates a fast transition at a predetermined time T after the application of input trigger. It is called as a gating circuit because it generates rectangular waveform at a definite time and could be used as gate parts of a system. 48.What is a triangular wave generator? It is obtained by integrating a square wave obtained by an astable multivibrator. 49.What is the main function of 555 timer? It is a higher stable device for generating accurate time delay or oscillation. 50.Mention few applications of 555 timer. • Oscillator • Pulse generator • Ramp and square wave generator • Monoshot multivibrator • Burglar alarm 51.What should be the voltage levels that should be provided at pin4 and pin2 of an IC555 monostable multivibrator? For reset to be effective,at input voltage at reset pin(pin4)should be less than 0.4V.Whenever the input at pin2 is larger than 1/3 VCC the output is high. 52. What is the function served by each of the block listed in timer IC?(a)Upper transistor (b)Discharge transistor? i. As the upper comparator gets 2/3VCC from the potential divider and the lower comparator 1/3VCC and also they aid in determining the time interval.

ii. the

When the output is high,0 is saturated and acts as a short circuit, shorting external capacitor to ground.

53. What is a filter circuit? It is often a frequency selective circuit that es a specified band of frequencies and attenuates signals of frequencies outside this band. 54.What is a counter timer? A timer connected in oscillator configuration and the output of the timer connected to the counter is known as counter timer.It can produce time delay ranging from microseconds to days. 55.Mention the application of the monostable mode of operation of 555IC. • Missing pulse detector • Linear ramp generator • Frequency divider • Pulse width modulation 56.IC555 timer is linear type IC.

57.Explain the function of reset in IC 555. The reset input provides a mechanism to reset the flipflop in a manner which overrides the effect of any instruction coming to FF from low comparator.This overriding reset is effective when the reset input is less than about 0.4V. 58.What is the time constant of 555 monostable circuit? T=1.1 RC where T is the time during which 555 circuit is on. 59.How can you turn off the output before the time constant in a monostable multivibrator circuit? When a negative going reset pulse is applied to the reset terminal during the timing cycle,transistor Q2 goes off Q1 becomes on and the external timing capacitor C is discharged. 60.Explain the principle of operation of the missing pulse detector monostable circuit. Whenever the input trigger is low,the emitter diode of the transistor is forward biased.The capacitor C gets clamped to few tenths of a volt (0.7V).The ouput of the timer goes HIGH.The circuit is designed so that the time period of the monostable circuit is slightly greater (1/3 longer) than that of the triggering pulse.So, as long as the triggering pulse train keeps coming at pin 2, the output remains HIGH.However if a pulse misses , the trigger input is high and transistor Q is cut-off.The 555 timer enters into normal state of monostable operation. 61.What are the main applications of the missing pulse detector monostable circuit? • Used to detect missing heart beat. • Used for speed control and measurement. 62.What is the main function of voltage regulator? Is to provide a stable dc voltage for processing other electronic circuits. 63.What are the different types of voltage regulators? • Fixed output voltage regulator(positive or negative) • Adjustable output voltage regulator(positive or negative)

• Switching regulators • Special regulators 64.What are switching regulators? Regulators which operates the transistor as a high frequency on/off switch,so that the power transistor does not conduct current continuously is called switching regulators. 65.What is a voltage regulator? It is an electronic circuit that provides a stable dc voltage independent of the load current,temperature and ac line voltage variations.

66. What are the 4 main parts of voltage regulators? • Reference voltage circuit • Error amplifier • Series pole transistor • network 67.Define Line regulation. It is defined as the percentage change in the output voltage for a change in the input voltage.It is usually expressed in millivolts. 68.Define Load regulation. It is defined as the change in output voltage for the change in input current.It is usually expressed in millivolts or as the percentage of Vo. 69.What are the main advantages of voltage regulator? • Short circuit protection • Ouput voltage(positive or negative)can be varied. 70.What are the limitations of 723 regulators? • No built in thermal protection • It has no short circuit current limits. 71.What is current limiting ability? It refers to the ability of a regulator to prevent the load current from increasing above a preset value. 72.How is the IC723 protected from short circuits(due to more load demand)? To protect the current from short circuits which may arrive due to the demand of more current by the load,an external resistor RSC is connected between the terminals CL and CS.CL is also connected to the output terminal VO and CS terminal to the load. 73.What is the main advantage of current method? Current method limits the short circuit current and get allow higher currents to the load. 74.How is current boosted in an IC regulator? The current is boosted by adding a boost transistor Q1 that comes from unregulated DC supply.The output current from VO terminal drives the base of

the transistor Q1.This base current gets multiplexed by the beta of the transistor, so that 723 has to provide only base current. So, Iload = βtransistor × Io(723) 75.What are the basic drawbacks of series regulators? • The input step down transformer used is bulky and most expensive component. • Since it operates at low line frequency,larger values of filter capacitors are required. • Efficiency is less. • More power is dissipiated in the series transistor,which is always in the active region.

76.How is dissipated in the series transistor,which is always in the active region? In a switched mode regulator,the transistor is used as a “controlled switch” and is operated at either cut-off or saturated state.Hence the power transmitted across the device ie. In discrete pulses rather than a steady current flow.Since,the device is operated as a low impedance switch higher efficiency is achieved. 77.The efficiency of the switched mode power supply is in the range of 70-90% 78.The output level is controlled by varying the pulse width of the switching waveform. 79.Why are series regulators called as series voltage regulators? Since the transistors conduct in the active or linear region,these regulators are called linear regulators or series regulators or voltage regulators. 80.What is an oscillator? It is basically a circuit where,a fraction VF of the output voltage VO of an amplifier is to the input. 81.What are the conditions to be satisfied for sustained oscillation?  The magnitude condition |AVβ | = 1  ∠ AVβ = 0o or 360o 82.Classify sine wave oscillators based on the range of frequency.  RC Oscillators for audio frequency  LC oscillators for radio frequency. 83.Why there is no phase shift provided in the network in Wein-Bridge oscillator? In Wein-bridge oscillator, the signal is connected to the (+) input terminal so that, the op-amp is working as a non-inverting amplifier.Therefore the network need not provide any phase shift. 85.Explain the principle of operation of practical Wein-Bridge oscillator. In practical Wein Bridge oscillator,resistor R4 is initially adjusted to give a gain,so that oscillations start.The output signal grows in amplitude,until the voltage across R3 approaches the cut-in voltage of the diode.As the diode begins to turn on,the effective resistance Rf decreases because the diode is in parallel with the resistance R3.This will reduce the gain of the amplifier which inturn lowers the output amplitude.Hence sustained oscillation can be obtained.Further if the output signal falls,the diodes would bedgin to turn-off,thereby increasing Rf which inturn increasing gain. 86.What is an electric filter?

It is often a frequency selective circuit that es a specified band of frequencies and blocks or attenuates signals of frequencies outside this band. 87.Classify filters. • Analog or digital • ive or active • Audio(AF) or radio frequency(RF).

88.What are the advantages of active filters?  Gain and frequency adjustment flexibility:Since the op-amp is capable of providing a gain,the input signal is not attenuated.The active filter is easier to tune or adjust.  No loading problem:Because of the high input resistance and low output resistance of the op-amp,the active filter does not cause loading of the source or load.  Cost:Typically active filters are more economical.This is because of the variety of cheaper op-amps and the absence of inductors. 89.What are the basic elements of filters? Each filter consists of op-amp as an active element and resistors and capacitors as ive elements. 90.Why is the Butterworth filter called flat-flat filter? The main characteristic of Butterworth filter is that,it has flat band as well as stop band.So Butterworth filter is called flat-flat filter. 91.What are the steps involved in deg a low filter? • Choose a value of high cut-off frequency fH. • Select a value of C less than or equal to 1µ F • Calculate the value of R using R = 1 2π fHC • Finally select values of R1 and Rf dependent on the desired band gainAF using, Af= 1+(Rf/R1). 92.What is frequency scaling? The procedure used to convert an original cut-off frequency fH to a new cut-off frequency fH is called frequency scaling. 93.What are the steps involved in deg second order low filter? • Choose a value of high cut-off frequency fH. • Set R2=R3=R and C2=c3=C and choose a value of C less than or equal to 1µ F. • Calculate the value of R using R = 1 2π fHC • RF should be equal to 0.586R1 .Hence choose a value of R1 ≤ 100Ω and calculate the value of Rf. 94.The roll-off rate in the stop band of second order-low filter is twice. 95.What is a band filter? A filter that allows the signal to through it, between the cut off frequencies fH and fL and attenuates all other frequencies outside this -band is called as a band filter. 96.What are the 2 types of band filters?

 

Wide band filter,which has its figure of merit Q,less than 10. Narrow band filter,which has its figure of merit Q,greater than 10.

97.What are the 2 unique features of narrow band- filter?  It has 2 paths, hence the name multiple filter.  The op-amp is used in the inverting mode. 98. What is the total time period of Astable multivibrator. Total time period is given as T= 2 T1 = 2RC ln 1+β 1- β where β = R2 R1+R2 99. Write the expression for pulse width monostable multivibrator. Pulse Width T= RC ln (1+ VD / Vsat) 1- β where β =

R2 R1+R2

100.Design the Wein bridge oscillator with fo = 965Hz Let C= 0.05μ F fo = 1 2 x 3.14x RxC R=

1 0.05x10 –6 x 965

R = 3.3 kilo ohms Av = 1+ (Rf/R1) = 3, Let R1= 12 kilo ohms Rf = 2 R1 = 2x12k = 24 kilo ohms ( use a 50 k POT)

UNIT III DIGITAL INTEGRATED CIRCUITS 2.

What is the main feature of CMOS. The main feature of CMOS is that both n-channel and P-channel is fabricated on the

same substrate. 3. What is integration density? It is the measure of the amount of logic placed on the silicon chip. 4. Write down the procedure for deg the transistor circuitry for CMOS logic circuit. • Construct the logic diagram using basic AOI or OAI structuring deeper nesting such as OAOI and AOAI is allowed. Deeper nesting OAOI and AOAI is allowed. • Use the gate nFET relations to construct the nFET logic circuit between the output and ground. • To obtain the topology of the pFET array,start with the original logic diagram and push the bubble back toward the input using the DeMorgans rules.Continue the backward pushing until every input is bubbled.The pFET circuitry between the output and VDD is then obtained. 5. What is a latch? It is a device that can receive and hold an input bit. 6. What is a bistable circuit? A bistable circuit is one that can store (or hold) either a logic 0 or a logic 1 indefinitely (or atleast as long as power is applied). 7. What is ring oscillator circuit? A closed loop with an odd number of inverter is called as ring oscillator as the signal at any point oscillates in time. 8. What is ? A is a general term that describes a group of circuits that are used to store a word or a group of flipflops.

9. What is a file? It is a collection of word-size storage s. 10. Explain the half adder circuit. A half adder circuit has z inputs(x and y) and 2 outputs( the sum S and the carry out C).The outputs are given by the equation S=x⊕y C=x.y 11. Write the verilog behavourial description of half adder circuit. Module half adder(sum, c-out,x,y); Input x,y; Output sum,c-out; Assign(c-out,sum)=x +y; End module. 12. Write the high level VHDL description of full adder circuit. Module full adder(sum, c-out,a,b,c-in); Input a,b,c-in; Output sum,c-out; Assign(c-out,sum)=a+b+c-in; End module. 13. What are the 3 operational modes of SRAM? They are hold, write and read.When the cell is in hold state, the value of the bit is stored in the cell for future use. During a write operation ,a logic 0 or 1 is fed to the cell for storage.The value of the stored bit is transmitted to the outside world during a read operation. 14. What is static noise margin? It is the separation between the curves along a 450 slope in the drawing and has unit of volts. 15. How is butterfly plot obtained? It is obtained by forcing an input on one of the internal nodes and plotting the response on the other side,then performing the same operation to the other side. 16. How are SRAM arrays obtained? They are created by replicating the basic storage cell and adding the necessary peripheral circuitry. 17. A 128*8 SRAM chip holds 128k 8bit words for a total of 1Mb of total storage.What should be the width of address word to select every 8-bit word location. M=log2(128K)=17 to select every 8-bit word location. 18. What is a floating gate? A reprogrammable ROM array is built using special FETs that use a pair of stacked poly gates.The top most gate constitutes the usual gate terminal of the

transistor.However,another poly gate layer is sandwiched in between the top poly and silicon substrates.It is not electrically connected to any part of the transistor or auxillary circuitry and is therefore called as electrically floating gate. 19. What is gate array? It is used to describe an entire class of devices.It refers to a programmable chip that can be logically configured. 20. What is logic array? It is a structural unit that can be “programmed” to provide various functions and system tasks.

21. Consider a DRAM cell with Cs=50pF and a bit line capacitance of Cbit=8Cs.Assuming a maximum voltage of VS=Vmax=2.5V on the storage capacitor.Find the final voltage during the logic read operation. Final voltage during logic read operation is Vf =(1/9)(2.5) = 278 mV 22. What is fan-in. The number of inputs to a logic gate is called the fan-in(FI). 23. What are nFET transistors? transistors are single FETs that the signal between the drain and source terminals of a fixed power supply value.

24.

Electric isolation is achieved in gate arrays using cut off transistors.

25. Explain RAM. RAM has the basic unit called binary cell.The binary cell can store either 1 or 0 indefinitely,as long as the power is ON.Data can be written into RAM as read out from RAM.The previously stored data can be erased and new data can be written into RAM.Hence it is called as read write memory.When power supply is switched OFF,all the binary cells gets erased. 26. What are the different types of RAM? o NOSRAMs(Nitride metal Oxide Semiconductor RAMs) o CMOS(Complementary metal oxide semiconductor RAMs) o Schottky TTL RAMs o ECL RAMs. 27. What are the 2 types of array in RAM?  Linear array  Coincident array

•

28. What is the procedure followed to store a new word in memory? Apply the binary address of the desired word to the address lines.

• •

• •

Apply the data bits that must be stored in memory to the data input lines. Activate the write input. The memory unit will then take the bits from the Input data lines and store them in the word specified by the address line. 29. What is the procedure followed to take a word out of memory? Apply the binary address of the desired word to the address lines. Activate the read input.The memory unit will then take the bits from the word that has been selected by the address and apply them to the data output lines. 30. What is memory enable or chip select? It is a control input which is used to enable the particular memory chip in a multichip implementation of a large memory.When the memory enable is inactive ,the memory chip is not selected and no operation is performed. .When the memory enable input is active ,the read/write determines the operation to be performed. 31. What is access and cycle time? The access time of the memory is the time required to select a word and read it.The cycle time of a memory is the time required to complete a write operation.

32. How does the read write input determines the type of operation? If read write is 1,the memory performs a read operation symbolized by the statement, Dataout Mem[Address]; If read write is 0,the memory performs a write operation symbolized by the statement, Mem[Address] DataIn; 33. Explain SRAM. It is an operating mode.It consista of internal latches that stores the binary information.The stored information remains valid as long as power is applied to the unit.It is easier to use and has shorter read and write cycles. 34. Explain DRAM. It is an operating mode,which stores the binary information in the form of electric charges on capacitors.The capacitors are provided in inside the chip by MOS transistors.The stored charge on the capacitors tend to discharge with time and the capacitors must be periodically recharged by refreshing the dynamic memory. Refreshing is done by cycling through the words every few milliseconds to restore the decaying charge. 35. Differentiate volatile and non volatile memory. Volatile memory

Non volatile memory

They are memory units which lose stored information when power is turned OFF.

It retains stored information when power is turned OFF.

Example:SRAM and DRAM.

Example:Magnetic disk and ROM.

36. 35.What is the use of 2-dimensional decoding?Give an example. Used to arrange the memory cells in an array in the form of a square. For example: A decoder with K inputs and 2k outputs requires 2k AND gates with K inputs per gate.The total number of gates and number of inputs per gate can be reduced by employing two decoders in a 2 dimensional selection scheme.It will result in two k/2 – input decoders instead of one k-input decoder.One decoder performs the row selection and other the column selection. 37. What are the 2 types of semiconductor memories? RAM and ROM. 38. What is meant by a non-destructive readout? Each memory location contains one byte of data.When a byte is read from the memory,it is not destroyed,but remains in the memory.This process of “copying” the contents of a memory location without destroying the contents is called non-destructive readout.

39. List out the advantage and disadvantage of dynamic RAM cell. Advantage: This type of cell is very simple thus allowing very large memory arrays to be constructed on a chip at a lower cost per bit than in static memories. Disadvantage: The storage capacitor cannot hold its charge over an extended period of time and will lose the stored data bits unless its charge is refreshed periodically.This process o f refreshing requires additional memory circuitry and complicates the operation of the dynamic RAM.

39.What is a ripple counter. A ripple counter is a counter that uses type T Flip flops to perform a counting function where each T lead is connected to output of previous stage. 40.Define a decoder. A decoder is a device that takes a binary word and energizes a particular line based upon contents of that word. 41.Explain half adder Here two one bit words are added ,resulting in two bits of data,a sum bit and a carry bit. 42. Explain full adder Full adder is a device capable of adding three binary bits ,resulting in a sum and carry. 43. Define memory address and capacity. The location of a unit of data in the memory array is its address.The capacity of a memory is the total number of data units that can be stored. 44.What is data bus and address bus. Data units go into memory during a write operation and come out of memory during a read operation on a set of lines called the data bus. For a read/write operation,an address is selected by placing a binary code representing the desired address on a set of lines called the address bus. 45.What is the main purpose of address burst feature.

It allows the memory to read or write upto 4 locations using a single address. 46.What are the types of DRAM Fast Page Mode (FPM) DRAM, the Extended Data Output(EDO) DRAM,the Burst Extended Data Output(BEDO) DRAM and synchronous DRAM.

UNIT IV VLSI INTEGRATED CIRCUITS 1.Draw the circuit symbol of nMOS depletion MOSFET. Drain Gate Source 2.What is diffusion mask or thin oxide mask? Mask 1- pattern Sio2 to expose the silicon surface in areas where paths in the diffusion layer or source, drain or gate areas of transistors are required. Deposits thin oxide overall. 3.Write short notes on fabrication of nMOS. • Processing takes place on a p-doped silicon crystal wafer on which is grown a thick layer if Sio2. • Mask 1- pattern Sio2 to expose the silicon surface in areas where paths in the diffusion layer or source,drain or gate areas of transistors are required.Deposits thin oxide overall. • Mask 2- Pattern the ion implementation within the thinox where the depletion mode devices are to be produced-self aligning. • Mask 3-Deposit polysilicon overall(1.5µ m thick typically),then pattern using Mask 3.Using the same mask, remove thin oxide where it is not covered by polysilicon. • Diffuse n+ regions into areas where thin oxide has been removed. Transistor drain and sources are thus self-aligning w.r.t the gate structures.

• • •

Mask 4-Grow thick oxide over all and then etch for outs. Mask 5-Deposits metal and pattern with mask 5. Mask 6-would be required by the over glassing process step.

4.What are the different approaches to CMOS fabrication? o P-well process o N-well process o The twin tub process o The silicon-on-insulator processes. 5. What are the 3 main steps of p-well process?  Masking  Diffusion  Patterning

6.Show the main steps in a typical n-well process.

Formation of n-well regions Define nMOS and PMOS active areas Field and gate oxidation (thinox)

Form and pattern polysilicon

N+ diffusion P+ diffusion cells Deposit and pattern metallization

Over glass with cuts for bonding pads 7.Explain the twin tub process. In this process, a substrate of high resistivity n-type material is started and then n-well and p-well regions are created. Through this process it is possible to preserve the performance of n-transistors without compressing the p - transistors. Doping control is more readily achieved some relaxation in manufacturing tolerances results. This is particularly important as far as latch-up is concerned. 8.Compare CMOS and bipolar technologies. CMOS technology 1.Low static power dissipation. 2.High input impedance.(low current). 3.High packing density. 4.High delay sensitivity to load.

Bipolar technology High power dissipation. drive Low input impedance.(high current). Low packing density. Low delay sensitivity to load.

drive

9.List out the steps behind the fabrication process of single poly gate metal CMOS. • Form n- well • Delineate active areas • Channel stop • Threshold VT adjustment • Delineate polygate areas • Form n+ active areas • Form p+ active areas • Define s • Delineate the metal areas. 10.E-beam masking is one of the methods of mask making. 11.What are the advantages of E-beam masks?  Tighter layer to layer registration  Smaller feature sizes. 12.What are the different approaches to the design of E-beam machines?  Raster scanning  Vector scanning 13.What is cross talk? Whenever an interconnect line is placed in close proximity to any other interconnect line, the conductors are coupled by a parasitic capacitance. Pulsing a voltage on one of the lines induces stray signals on all lines that are coupled to it. This phenomenon is called cross talk. 14.Draw the general overview of design hierarchy. System specifications Abstract high level model VHDL,verilog HDL Logic synthesis Circuit design Physical design Manufacturing Finished VLSI chip

15.Explain the term reliability. It is concerned with projecting the lifetime of a component once it is placed into operation.It is defined as the probability that an item will perform a required function under stated conditions for a stated period of time.

16.What are the 3 major regions of bathtub curve. Infant mortalities are the failures that occur after a very short period of time ie early in the system. These tend to arise from manufacturing defect that manifest themselves after a few hours of operation. The central portion of the curve represents random failures during normal operation, while wear-out describe the end of life. 17.What is a vector? It is an array of binary inputs that are applied to the device-under-test(DUT) or the chip under test. 18.What is the main purpose of performing functional testing? Used to determine whether a chip is good or bad by forcing the circuit to perform various functions and checking the response. 19.Explain the short-circuited FET. A short-circuited FET is one that always conducts the drain source current with an applied drain source voltage VDS.The gate has no control over the operation. 20.What is fault dominance? When sa1 fault occur at both the input and the output of an And gate. The output overrides the input fault, so that anything to the left of the gate may be ignored. This is called fault dominance. 21.What is path sensitization? When the gate to be tested is embedded on a larger logic network, we can use the existing circuitry to create a specific path from the location of the fault to an observable output point.This technique is called path sensitization. 22.What is path propogation? The process of creating the path is called propagation. 23.What are the 2 steps involved in path sensitization?  Forward drive  Backward trace. 24.What is infant mortalities? Infant mortalities are failures that occur after a very short period of time(ie) early in the life of the system. These tend to arise from manufacturing defects that manifests themselves after a few hours of operation. 25.Consider a small chip that has about 2,00,000 FETs. What is the FIT value needed to achieve an average reliability of no more than 1 transistor failure over 1 year? Assuming 8760 hours per year,we see that the FETs represent a total of (2,00,000) * (8760)=1.752 * 109 device hours / years.To find the FITs needed to obtain 1 failure per year we write (x/109)(1.752 * 109) = 1 where x is the FIT value.

Solving gives x=0.67 FITs as the required rate.

26.Give the expression for mean time to failure(MTTF). It is given by, MTTF = T = 1 N Xav 27.How is the average failure rate(AFR)obtained? AFR between 2 times t2 > t1 is obtained by the ratio of the failure rate to the duration of the timing interval. Assuming t2 = T and t1= 0 for simplicity gives, AFR(t)= 1 T 28.What is the main drawback of path sensitization? One drawback of path sensitization is that the process of generating test vectors may become long and involved. 29.What is Local Oxidation. Oxidation can be made selective by depositing and patterning Si3N4 before Oxidation ,which allows the oxide to form only wherever Si3N4 is removed ,since Si3N4 blocks the oxidation.This is called Local Oxidation. 30.How is the minimum feature size determined Minimum feature size determined by the ability to reproduce feature routinely i.e how accurately the feature can be transferred to Silicon during pattern transfer process. 31.What are Nesting Tolerances. Distances required to “nest” the features of one level with respect to features on a previous level is called Nesting Tolerances. 32.What is the purpose of chan stop region. It serves the isolation between two transistors in the same IC chip. 33.Give the principle of operation of an nMOS transistor. It operates by causing a negative charge to move from source to drain in response to a positive charge on the gate. 34.Give the two modes of operation of NMOS transistors. i)

Enhancement mode

ii)

Depletion Mode

35.What is threshold adjust implant. If boron implant is done in fabrication process to adjust the threshold voltage of a particular transistor ,then it is threshold adjust implant.

36.What is the purpose of P-Glass P-Glass(Phospho-Silicate Glass ) serves 2 important purposes. i)

It reduces viscosity and at low temperatures ,glass will flow to smooth the surface topography.

ii)

Protects from mobile ion(Na) contamination.

37. What is “birds beak encroachment” Growth of field oxide layer causes oxide to penetrate under masking nitride layer.This causes space between transistors to grow during oxidation.This oxide growth under nitride layer is called “birds beak encroachment” 38.Define Punch-through If channel doping is too high ,a reduction in carrier mobility occurs at the surface and if too low,drain electric field will punch through to source .This is Punch-through and it indicates source and drain are nearly touching. One technique to reduce punchthrough is to implant boron deep into channel region to raise substrate doping without changing surface concentration. 39.What is hot electron problem. This arises when device dimensions are reduced ,but supply voltage is held constant,and results in increase in electric field generated in Silicon.Thus electrons gain sufficient energy and gets injected into gate oxide.Now charging of gate oside occurs which raises VT. One approach to minimise this is to reduce electric field at drain region. 40.What is p-tub(p-well) process. This process involves p-type dopant into n-substrate at a concentration that is high enough to compensate n-substrate and tto have good control over desired p-type doping. 40.What is n-tub(n-well) process.

n-tub is formed in a p-type substrate.n-channel device is formed by ptype substrate. 41.What is Trench Isolation Trench Isolation is etching a narrow deep groove in Silicon and then filling it with oxide or polysilicon.It is used to decouple bipolar transistors. 42.How was the base width determined in Bipolar IC Technology. It is determined by difference between two impurity diffusion profiles and this technology is used for high speed app;cations. 43.Define Gummel Number. Total integrated charge in active base is called Gummel Number.as Gummel number decreases,gain of transistor increases. 44.What is Integrated Injection logic.(I2L logic) Integrated Injection logic.(I2L logic) also called merged transistor logic(MTL). And allows close packing of transistors.Logic element consists of a pnp transistor connected to a series of npn transistors.Collector of pnp and base of npn are electrically connected and share a common p-type.npn transistors share a common emitter. 45.What is Class 100 environment Environment having a maximum of 100 particles per cubic foot with particles larger than 0.5 micro meter. 46.What is the purpose of automatically generated wafer map. This shows misalignment distances and direction of misalignment between levels in a CMOS process. 47.Give the expression for failure rate. λ<

1 Failure 105 devices x 720 hours

λ< 14 FIT ,where 1 FIT = 1 Failure Unit =

1 Failure

109 Device-Hour 48. Define the term “Soft error” It refers to random failure not related to physically defective device.These errors are reduced by coating IC with a material of low density of radio active contamination. 49.Define Rents Rule. Number of signal terminals or package I/O’s required for logic devices can be estimated using an empirical relationship known as Rents Rule. Number I/O = α (Gate Count)β 50.What are two die bonding methods and wire bonding methods. 2 Die bonding methods are i) Hard Solders(Eutectic) ii) Polymers ( Epoxies & Polymides) 2 Wire bonding methods are i) Thermosonic & Themo compression ball and wedge using Au wire ii) Ultrasonic wedge-wedge using Au –Al wires.

51.Give the advantage of CMOS technology. Power consumed by the device is very less.This is due to the fact that ,the logic element draws significant power only during transitions from one state to another. 52.What are the future trends for devices. Trends are towards i) Self aligned structures ii) Three dimensional devices 53.What are the different types of packages i) SIP (Single –In- Line Package) ii) DIP( Dual-In-Line Package) iii) PGA(Pin Grid Array Package) iv) BGA(Ball Grid Array Package) v) LCC ( Leadless Chip Carrier) vi) PLCC ( Plastic Leadless Chip Carrier) 54.What are the package fabrication technologies i) Ceramic Package Technology ii) Plastic Moulding Technology iii) Glass Sealed Refractory Technology 55.Define Availability. It is the probability that an item will operate when needed ,or the average fraction of time that a system is expected to be in operating condition. 56.What are the typical failures that occur in semiconductor devices. i) Surface charge accumulation ii) Dielectric breakdown iii) Electromigration iv) Corrosion v) Material Fatigue vi) degradation 57.What is meant by thermal and electrical burn-in. The burn-in test is used to accelerate the fault growth rate so that the devices which

are prone to infant mortality are identified easily.The burn-in process involves keeping the devices in a temperature cycling oven in the supplies feeding to them.

UNIT V SPECIAL APPLICATION ICs 1.What is the use of sample and hold circuit? It samples an input signal and holds onto its last sampled value,until the input is sampled again. 2.Mention few applications of sample and hold circuit. • Analog to digital systems • Pulse code modulation systems. 3.What is sample period? The time during which voltage across the capacitor is equal to input voltage is called sample period. 4.What is hold period? The time period TH during which the voltage across the capacitor is hold constant is called time period. 5.List out some of the commercially available sample and hold ICs. oHarris semiconductor HA2420 oNational semiconductor such as LF198,LF393. 6.To obtain close approximation of the input waveform, the frequency of the sample and hold circuit must be significantly higher than that of the input. 7. What is Analog to Digital(A/D)Converter? A circuit which converts the analog signal to digital signal is called analog to digital converter.

8.When is D/A converter used? A digital to analog converter is used when a binary output from a digital system must be converted to some equivalent analog voltage or current. 9.List out some applications of the A/D and D/A converters.  Digital audio recording and playback  Computers  Music and video synthesis  Pulse code modulation and transmission  Data acquisition  Digital multimeter  Direct digital control  Digital signal processing  Microprocessor based instrumentation

10.List out the various resistive DAC techniques available. • Weighted resistor DAC • R-2R ladder • Inverted R-2R ladder 11.What is the resolution for a DAC? The resolution of the converter is the smallest change in voltage,which may be produced at the output of the convertor. 12.What are the 2 broad classification of ADCs  Direct type ADCs  Integrating type ADCs 13.List out the direct type ADCs.  Flash(comparator)type converter  Counter type converter  Tracking or servo converter  Successive approximation type converter 14.List out some integrating type converters.  Charge balancing ADC  Dual slope ADC 15. What is integrating type converter? An ADC converter that performs conversion in an indirect manner by first changing the anaput signal to a linear function of time or frequency and then to a digital code is known as integrating type converter. 16.Where are the successive approximation type ADCs used? Used in applications such as data loggers and instumentation where conversion speed is important. 17.The input stage of any data acquisition system will be sample and hold circuit. 18.Successive approximation type of ADC has least conversion time. 19.Name the various types of electronic switches used in DAC. • Single pole double throw • Totem pole MOSFET switch • CMOS inverter switch 20.What is the main disadvantage of flash type A/D converter? The main disadvantage of flash type A/D converter is that, the number of comparators required

almost doubles for each added bit. ADC needs 7 comparators.

For eg:A 2 bit ADC requires 3 comparators, 3 bit

21.What are the total number of clock pulses required for 8- bit Successive approximation A/D converter? 8 clock pulses. 22.Explain the principle of operation of Successive approximation ADC. The circuit consists of a Successive approximation (SAR), to find the required value of each bit by trial and error with the arrival of START command,SAR sets the MSB bit to 1.The output is converted into an anolog signal and it is compared with input signal.The ouput is low or high.This process continues until all bits are checked. 23.What are the main advantages of integrating type ADCs? • Do not require a S/H circuit at the input. • It is possible to transmit frequency even in noisy environment or in an isolated form. 24.Give the expression for output voltage Va of dual slope converters. Va = (VR)(N) (2n) where, Va -> analog output voltage(Va) VR->reference voltage N-> digital count N. 25.Define absolute accuracy. It is the maximum deviation between actual converter output and ideal converter output. 26.Define relative accuracy. It is the maximum deviation between actual converter output and ideal converter output,after gain and offset errors have been removed. 27.What is monotonic DAC? A monotonic DAC is one whose analog output increases for an increase in digital input. 28.What is settling time? It is the time taken for the output to settle within a specified band ± (1/2) LSB of itS Final value following a code change at the input. 29.List out some A/D converters. • AD 7520 /AD 7530 • AD 7521 / AD 7531 • ADC 0800 / 0801 /0802

30. List out some D/A converters.  DAC 0800/0801/0802  DAC 0830/0831/0832  DAC 1200/1201  DAC 1208/1209/1210 31.What is the main function of CS? The input must be in its active low state for RD or WR inputs to have any effect.With CS high, the digital outputs are in the Hi-Z state,and no conversions can take place. 32.Describe the function of WR and RD inputs. RD(Read).This input is used to enable the digital output buffers.With CS=RD=LOW,the digit output pins will have logic levels representing the results of the last A/D conversion.The micro computer can then read (fetch)this digital data values over line system data bus. WR(Write).A LOW pulse is applied to this input to signal the start of a new conversion.This is actually start conversion input.It is called a WRITE input because in a typical application the microcomputer generate a WRITE pulse(similar to one used for routing to memory)that drives this input. 33.What is the function of the INTR output? This output signal will go HIGH at the start of a conversion and will return LOW to signal the end of conversion.This is actually an end-of-conversion output signal,but it is called INTERRUPT because in typical situation it is sent to microprocessors interrupt input to get the microprocessors attention and let is known that the ADC’s data are ready to be read. 34.What is the purpose of VIN(-1)? In ADC0804,the input signal is varying over a range of 0.5 to 3.5V.Inorder to make full use to the 8-bit resolution,the A/D must be matched to the analog signal specifications.In this case, the full scale range is 3.0V.However it is offset from ground by 0.5V.The offset 0.5V is applied to the negative input VIN(-1) establishing this as the 0 value reference. 35.What is step size or resolution? The size or magnitude of each pin is the analog equivalent weight of the least magnitude bit.This is called step size. 36.What are analog signals? Physical variables that we want to measure,such as temperature,pressure,humidity,distance,velocity and so on,are continuously variable quantities.A transducer can be used to translate these quantities into an electrical signal of voltage or current that fluctuates in proportion to the physical variable.These continuously variable voltage or current signal are called analog signals.

37.What is acquisition time? It is the amount of time the switch would have to remain closed. 38.The ADC0808 can multiplex 8 different anaputs into one ADC.

PART-B UNIT-I 1.Explain in detail ,about photolithography, ion implantation and epitaxial growth in IC fabrication. Refer Page No.9 in T1. 2.Explain various methods of fabricating transistors in monolithic Integrated circuit. Refer Page No.21 in T1. 3.Fabricate a typical circuit using IC fabrication steps. Refer Page No.16 in T1. 4. Explain various methods of fabricating resistors in monolithic Integrated circuit. Refer Page No.28 in T1. 5.Briefly explain about crystal growing techniques. Refer Page No.5 in T1. UNIT-II 6. Draw & Explain the operation of a square wave generator and obtain an expression for its frequency. Refer Page No.232 in T1. 7.Explain with circuit and waveform the use of IC 555 as an monostable multivibrator. Refer Page No. 236 in T1.

8. Draw the circuit of a Wien Bridge Oscillator using Op-Amp and derive an expression for frequency of an oscillator. Refer Page No. 244 in T1. 9. With the schematic of a simplest realization of Voltage Controlled triangular/Square Wave Oscillator and explain its waveform too. Refer Page No.361 in T1. 10. Explain in brief, with necessary diagrams, the astable mode of operation of a 555 timer IC. Refer Page No.341 in T1. 11.Discuss about monolithic voltage regulator IC LM723.Show connections to supply output voltage from 2 to 7V. Refer Page No.255 in T1.

12. Draw & Explain the operation of a triangular wave generator and obtain an expression for its frequency. Refer Page No.239 in T1. 13.Briefly explain about Instrumentatation amplifier with neat sketches. Refer Page No.148 in T1. UNIT-III

14. Draw the circuit of CMOS NOR gate. Refer Class Notes. 15.Design a synchronous decade counter using JK Flipflops. Refer Page No.367 in R1. 16.Design a circuit which will go through the following sequence using JK Flipflops in T- FF

mode 1,3,7,6,1,… If initial state of sequence counter is 4,check the circuit you have designed. Refer Class Notes. 17. If f1 = A.B.C and f2 = A+B+C .Realize the logic using CMOS Refer Class Notes. 18.Discuss in brief about Static RAMs. Refer Page No.

in R3.

19.Discuss in brief about Dynamic RAMs. Refer Page No.

in R3.

UNIT-1V

20. Explain in detail about any 2 CMOS process with clear sketches. Refer Page No.483 in R2. 21.Write in brief about Si Wafer preparation schemes. Refer Page No.585 in R2. 22. Show the flow diagram of major steps in bipolar IC fabrication technology.Explain with suitable figures. Refer Page No.499 in R2. 23.In brief discuss about requirement of design for VLSI & Failure mechanisms and Rates in semiconductor devices. Refer Page No. 625 in R2. 24.Explain in detail about NMOS IC technology. Refer Page No.472 in R2. 25.Briefly explain about the packaging of VLSI devices. Refer Page No.595 in R2.

UNIT-V

26. Explain in detail ,about R-2R ladder DAC and Inverted R-2R ladder DAC. Refer Page No.387 in T1. 27.Explain in detail about dual slope ADC . Refer Page No.402 in T1. 28.Write short notes on i)

Switched Capacitor Filters

ii)

Function Generators

Refer Page No. 409 &496 in T2. 29. Explain in brief about Successive Approximation ADC. Refer Page No.400 in T1. 30. Explain in brief about Flash type ADC. Refer Page No.395 in T1. TEXT BOOKS: 1. D.Roy Choudhury, Shail Jain ,“ Linear Integrated Circuits”New Age International Publishers, New Delhi . 2.Ramakant A.Gayakwad , “ Op-Amps and Linear ICs”. REFERENCE BOOKS: 1. D.A.Godse, A.P.Godse, “Digital Systems” ,Technical Publications. 2. S.M.Sze ,“VLSI Technology ” Mc-Graw Hill International Editions. 3. Digital Fundamentals by Floyd.