Ch6-parallel Io Port 116n4k

Parallel I/O Port

Introduction • A parallel I/O port is used for interfacing with external peripherals • Writes (output) data and reads (input) data • I/O devices – LEDs – Seven-segment display – Switches

Introduction • An I/O port consists of a set of I/O pins and the s required to control its operation • An I/O pin can be configured for input or output • An I/O pin usually serves multiple functions • When it is not used as a peripheral function, it can be used as a general-purpose I/O pin.

Port A Port B

HCS12 I/O Ports & Pin Names

Table 4.5 Num ber of pins available in each paralle port Port Nam e

No. of Pins

A B E H J K M P S T PAD1, PAD0 L U V W

8 8 8 8 4 7 8 8 8 8 16 8 8 8 8

Pin Nam e PA7~PA0 PB7~PB0 PE7~PE0 PH7~PH0 PJ7~PJ0 PK4~PK0 PM 7~PM0 PP7~PP0 PS3~PS0 PT7~PT0 PAD15~PAD0 PL7~PL0 PU7~PU0 PV7~PV0 PW 7~PW0

8-bit I/O ports

I/O Port Direction Configuration • Data direction (DDR) is used to configure the direction of each pin (8 pins) of I/O port – Input – Output

• DDR is 8-bit • Setting a bit of the DDR to 1, the corresponding I/O pin is configured as output • Setting a bit of the DDR to 0, the corresponding I/O pin is configured as input

I/O Port Direction Configuration

DDRA

b7

b6

b5

b4

b3

b2

b1

b0

0

0

0

0

0

0

0

0

PA7 PA6 PA5

Port A

PA4 PA3 PA2 PA1 PA0

All pins are input

I/O Port Direction Configuration

DDRA

b7

b6

b5

b4

b3

b2

b1

b0

1

1

1

1

1

1

1

1

PA7 PA6 PA5

Port A

PA4 PA3 PA2 PA1 PA0

All pins are output

I/O Port Direction Configuration

DDRA

b7

b6

b5

b4

b3

b2

b1

b0

0

0

0

0

1

1

1

1

PA7 PA6 PA5

Port A

PA4 PA3 PA2 PA1 PA0

PA4-PA7 are input PA0-PA3 are output

I/O Port Direction Configuration • Each data direction is assigned an address – ie. address of Port A DDR is $02 movb

#$FF, $02

; configure Port A as output

– equ directive can be used to represent address of Port A DDR DDRA

equ movb

$02 #$FF, DDRA

; configure Port A as output

I/O Port Data • Data is used to send data to or from I/O devices – To perform output (send data to I/O port), write the data – To perform input (receive data from I/O port), read the data

• Each data is assigned an address – ie. Port A data is assigned address 0 movb

#$35,0 ; address 0 is Port A data ; value of $35 is send to Port A

– equ directive can be used to represent address of Port A data PORTA

equ movb

0 #$35, PORTA

; PORTA is address 0

Example of I/O Operation movb staa movb movb movb

#$FF, DDRB PORTB #$67, PORTB #0, DDRA #PORTA, ibuf

; ; ; ; ; ;

configure Port B as output output A to Port B output $67 to Port B configure Port A as input read Port A and save it at ibuf memory location

Electrical Characteristics  Electrical compatibility issues needs to be considered when interfacing I/O device to the MCU • Two major concerns in interfacing IC chips – Voltage-level compatibility • Is the high output level of an IC chip high enough to be considered as a high for the input of another IC chip? Is the low output level of an chip low enough to be considered as a low for the input of another IC chip?

– Current drive capability • Does the output of an IC chip have enough current to drive its load? Can the output circuit of an IC chip sink the currents of its load?

Voltage –level Compatibility •

Voltage parameter needs to be considered – Input high voltage (VIH): voltage that be treated as a logic 1 when applied to the input of a digital circuit. – Input low voltage (VIL): the voltage that be treated as a logic 0 when applied to the input of a digital circuit – Output high voltage (VOH): the voltage level when a digital circuit outputs a logic 1 – Output low voltage (VOL): the voltage level when a digital circuit outputs a logic 0



In order for device X to drive device Y correctly, the following condition must be satisfied:  Output high voltage of device X (VOHX) must be higher than input high voltage of device Y (VIHY). VOHX > VIHY  Output low voltage of device X (VOLX) must be lower than the input low voltage of device Y (VILY). VOLX < VILY

Table 7.1 Input and output voltage levels of common logic families Logic family

VCC

VIH

VOH

VIL

VOL

HCS123 S4 LS4 AS4 F4 HC3 HCT3 ACT3 ABT5 BCT5 FCT5

5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V

3.25 V 2V 2V 2V 2V 3.5 V 3.5 V 2V 2V 2V 2V

4.2 V 3.0~3.4 V1 3.0~3.4 V1 3.0~3.4 V1 3.4 V 4.9 V 4.9 V 4.9 V 3V 3.3 V 2.4 V

1.75 V 0.8 V 0.8 V 0.8 V 0.8 V 1.5 V 1.5 V 0.8 V 0.8 V 0.8 V 0.8 V

0.8 V 0.4~0.5 V2 0.4~0.5 V2 0.35 V 0.3 V 0.1 V 0.1 V 0.1 V 0.55 V 0.42 V 0.55 V

Notes. 1. VOH value will get lower when output current is larger. 2. VOL value will get higher when output current is larger. The VOL values of different logic gates are slightly different. 3. HCS12, HC, HCT, ACT are based on the CMOS technology. 4. S, LS, AS and F logic families are based on the bipolar technology. 5. ABT, BCT, and FCT are using the BiCMOS technology.

Current Drive Capability  A device that drives other devices must have enough sourcing (supply current) and sinking (absorb current) capability  Current flows out from the driving device when the driving voltage is high  Current flows into the driving device when the driving voltage is low  The driving device must be able to supply (or sink) enough current needed by those devices being driven for proper operation

Cont.  If a device cannot source or sink enough current, then using buffer device is a common solution  The current capabilities of a logic device are determined by the following currents:  Input high current (IIH): The input current (flowing into the input pin) when the input voltage is high.  Input low current (IIL): the input current (flowing out of the input pin) when the input voltage is low.  Output high current (IOH): The output current (flowing out of the output pin) when the output voltage is high  Output low current (IOL): The output current (flowing into the output pin) when the output voltage is low.

Cont.  To determine whether a pin can supply and sink currents to all the peripheral pins that it drives directly, the following requirements need to be checked:  The IOH of an output pin must be equal to or larger than the total current flowing into all the peripheral pins that are connected to directly to the uC I/O pins  The IOL of an output pin must be equal to or larger than the total current flowing out from all the peripheral pins that are connected directly to uC I/O pins

• Need to make sure that the total current needed to drive the peripheral signals pins does not exceed the total current that the microcontroller can supply. • What should be done if an I/O cannot supply or sink the current needed to drive the peripheral pins? – Use buffer chips

Table 7.4 Current capabilities of common logic families1 Logic family

VCC

HCS1223 S LS AS F HC3 HCT3 ACT3 ABT3 BCT FCT3

5V 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V

IIH 2.5 A 50 A 20 A 20 A 20 A 1 A 1 A 1 A 1 A 20 A 1 A

IIL

IOH

IOL

2.5 A 1.0 mA 0.2 mA 0.5 mA 0.5 mA 1 A 1 A 1 A 1 A 1 mA 1 A

25 mA 1 mA 15 mA 15 mA 1 mA 25 mA 25 mA 24 mA 32 mA 15 mA 15 mA

25 mA 20 mA 24 mA 64 mA 20 mA 25 mA 25 mA 24 mA 64 MA 64 mA 64 mA

Notes. 1. Values are based on the 74xx244 of Texas Instrument (xx is the technology name) 2. The total HCS12 supply current is 65 mA. 3. The values for IIH and IIL are input leakage currents.

Interfacing with LEDs • Indicate system operation • Power-on, mode indicator etc.

• Current required to light an LED is ±10 mA • Voltage drop across an LED ranging from 1.6V - 2.2 V

Interfacing with LEDs • Three (3) interfacing methods

VCC Port pin

VCC

R1

Port pin

(a) Positive direct drive

R2

(b) Inverse direct drive

Port pin

74HC04

R3

(c) Buffered drive

Figure 4.15 An LED connected to a CMOS inverter through a current -limiting resistor .

Example 4.12 • Write a program to drive the LEDs shown in Figure 4.16 so that one LED is lighted at a time from top to bottom and then from bottom to top with each LED lighted for about 200 ms. H C S1 2 1.5 K  PB7 PB6 PB5 PB4 PB3 PB 2 PB 1 PB 0 PJ1 Figure 4 .1 6 C ircuit connection for Exam ple 4 .1 2

#include org lpcnt ds.b org Start movb bset bclr forever movb ldx led_lp movb ldy jsr dec bne bra

"C:\miniide\hcs12.inc" $1000 1 $1500 #$FF,DDRB ; configure port B for output DDRJ,$02 ; configure PJ1 pin for output PTJ,$02 ; enable LEDs to light #16,lpcnt ; initialize LED pattern count #led_tab ; Use X as the pointer to LED pattern table 1,x+,PORTB ; turn on one LED #5 ; wait for half a second delayby100ms ; " lpcnt ; reach the end of the table yet? led_lp forever ; start from beginning

led_tab dc.b dc.b

$80,$40,$20,$10,$08,$04,$02,$01 $01,$02,$04,$08,$10,$20,$40,$80

; ;

#include "C:\miniide\delay.asm" org $FFFE ; uncomment this line for CodeWarrior dc.w start ; uncomment this line for CodeWarrior end

Seven-Segment Display • A common necessity for many different digital devices is a visual numeric display • Individual LEDs can display the binary states of a set of latches or flip-flops • However human more used to dealing with decimal numbers clearly represent decimal numbers without translating binary to decimal

Seven-Segment Display • One possibility is to arrange the minimum possible number of LEDs in such a way as to represent only numbers in a simple fashion • Seven LEDs (plus an eighth one for the decimal point, if needed) • Seven bars are laid out as a squared-off figure "8“ and is known as a seven-segment display • Use to display decimal digits, small subset of letters

Interfacing with Seven-segment  I/O port can drive a seven-segment display directly  Buffer chips are used mainly to save excessive current draw from the HCS12

Interfacing with Seven-segment  HCS12 I/O port drives seven-segment display through a buffer chip 74HC244

470  each

H CS12

a

74HC244

PB6 PB5 PB4 PB3 PB2 PB1 PB0

b f c

a b g

d e e c f d g com m on cathode

Figure 4.17 D riving a single seven -segm ent display

Decimal to 7-segment Decoder • Values for displaying decimal digits depends on how sevensegments a-g are connected to the I/O pins • Dragon12 demo board – segments a-g are connected to from the pin PB0 ~ PB6

Table 4.7 Decimal to seven -segment decoder Decimal digit 0 1 2 3 4 5 6 7 8 9

Segments

Corresponding Hex Number

a b c d e f g 1 0 1 1 0 1 1 1 1 1

1 1 1 1 1 0 0 1 1 1

1 1 0 1 1 1 1 1 1 1

1 0 1 1 0 1 1 0 1 1

1 0 1 0 0 0 1 0 1 0

1 0 0 0 1 1 1 0 1 1

0 0 1 1 1 1 1 0 1 1

Figure 4.17 circuit

Dragon12 demo board

$7E $30 $6D $79 $33 $5B $5F $70 $7F $7B

$3F $06 $5B $4F $66 $6D $7D $07 $7F $67

Multiple 7-segment Display  A time-multiplexing technique is often used to display multiple digits

#0

800 

a b

. . .

800  g

PB6

PB1

PB0

common cathode

74HC367

PP0

A0

Y0

PP1

A1

Y1

PP2

A2

Y2

PP3

A3

Y3

PP4

A4

Y4

PP5

A5

Y5

#5

. . . . . .

. . . g

74HC244

HCS12

#1 a b

a b

. . . g common cathode

common cathode

. . .

Figure 4.18 Port B and Port P together drive six seven -segment displays (MC9S12DG256)

Multiple 7-segment Display • The circuit can display up to six digits simultaneous using the timemultiplexing technique • The HCS12 lights one digit for a short period of time and then switches to the next digit • Within one second, each digit is lighted in turn many times • Due to the persistence of vision, all six digits appear to be lighted at the same time

Example 4.13 • Write an instruction sequence to display 7 on the seven-segment display #5

seven

equ org movb movb movb movb end

$07 $1500 #$FF,DDRB #$3F,DDRP #$1F,PTP #seven,PTB

; ; ; ;

configure Port B for configure Port P for enable display #5 to send out the segment

output output be lighted pattern of 7

Example 4.14 • Write a program to display 123456 on the six seven-segment displays

#include "c:\miniide\hcs12.inc" org $1500 start lds #$1500 movb #$FF,DDRB movb #$3F,DDRP forever ldx #DispTab ; set X to point to the display table loopi movb 1,x+,PTB ; output segment pattern movb 1,x+,PTP ; output display select ldy #1 jsr delayby1ms ; wait for 1 ms x #DispTab+12 ; reach the end of the table? bne loopi bra forever #include "c:\miniide\delay.asm" DispTab dc.b $06,$1F dc.b $5B,$2F dc.b $4F,$37 dc.b $66,$3B dc.b $6D,$3D dc.b $7D,$3E ; org $FFFE ; uncomment this line for CodeWarrior ; dc.w start ; uncomment this line for CodeWarrior end

DIP Switch • A set of manual electric switches that are packaged in a group in a standard dual in-line package (DIP) • Commonly used to customize the behavior of an electronic device for specific situations – store setting/configuration

Interfacing with DIP Switch  A dual-in-line package can be connected any port with 8 pins  A set of pull-up resistors are needed to pull the voltage to high on one side of the DIP V CC

SW DIP-8

10 K

H CS12

PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7

Figure 4.19 Connecting a set of eight DIP switches to Port A of the H CS 12

Keypad • Keypad is input device that is constructed by arranging an array of switches – mechanical, membrane, capacitive or Hall effect • Mechanical switches have a problem called bounce. – Mechanical switch generates a series of pulses because the switch s do not come to rest immediately. – A human cannot press and release a key switch in less than 20ms – During this interval, microprocessor can scan the same key switch closure tens or even hundreds of thousands of times

• Debouncing is needed to solve the disparity in speed between the microprocessor and human key pressing – Re-scan the key switch closure to make sure a key is indeed pressed

Keypad scanning

HCS12 MCU PA7 PA6 PA5 PA4 PA3

3

7

B

F

PA2

2

6

A

E

PA1

1

5

9

D

PA0

0

4

8

C

10 K

VCC Figure 7.32 Sixteen-key keypad connected to the HCS12

PA7

PA6

PA5

PA4

1 1 1 0

1 1 0 1

1 0 1 1

0 1 1 1

Selected Keys 0, 4, 8, C,

1, 5, 9, D,

2, 6, A, E,

and 3 and 7 and B and F

Table 7.12 Sixteen-key keypad row selections