Pulse Digital Circuits 4d695d

UNIT 1 LINEAR WAVE SHAPING 2M Questions: 1. What is meant by linear and non-linear wave shaping? 2. Obtain and sketch the response of high and low RC circuits for step, pulse square, ramp and exponential inputs.** 3. Distinguish between high and low RC circuits and list its applications** 4. What are the conditions of RC circuits to behave as an integrator & differentiator? (3M)** 5. Define tilt and derive the expression. 6. Show that a low- RC circuit can be used as an Integrator. 7. A low RC circuit with 3dB cut off frequency of 30 kHz is subjected to a 20V step voltage. Determine its rise time and time to reach 12.6V. 8. What are the applications of high and low applications of RC circuit? 9. What are the different types of input wave forms to wave shaping circuits? 10. Write about ringing circuit in brief (2011) 11. Briefly explain response of an attenuator to a step input (3Ms -2012) 8M Questions: 1. A 10μf capacitor is charged via a 10KΩresistor from a 5V source. If the capacitor has an initial charge of -2V, calculate its charge after 50ms. 2. Any Symmetrical wave whose peak to peak amplitude is 22V and average value is zero is applied to an RC integrating circuit. The time constant equals one-fourth of the square wave. Find two peak to peak value of the steady state output waveform and also sketch the input and output waveforms. 3. A square wave is impressed on a RC low circuit. Calculate and plot the output with respect to input under steady state with T1=T2=RC 4. For an RC low- circuit, the input is a ramp signal. Obtain its output response. 5. Prove that an RC circuit behaves as a reasonably good integrator if RC>>15T is the period of an input sinusoid Vmsinwt. 6. Draw the voltage waveforms across R and C of an RC circuit having a time constant of 2ms. When the input voltage is a square wave of ±5V at 1 KHz frequency. 7. Obtain & sketch the response of RC high circuit foe a square wave input for different time constant. 8. Obtain & sketch the response of RC high circuit foe a ramp wave input. 9. Write a short notes on high RC circuit as a Differentiator.**

10. Prove that for any periodic input waveform, the average level of the steady state output signal from the RC high circuit is always zero. 11. A triangular waveform of 5 KHz with 10V is impressed upon an RC

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high circuit whose time constant is 0.01ms. Calculate and plot the output waveform with respect to input under steady state. Why a double differentiation circuit is called a rate of rise amplifier. Draw and explain the response of high rc circuit to Symmetrical square wave input, exponential & ramp input. (14M -2012) Derive the expressions for voltage across R and L of an RL circuit when the input voltage is a square wave. Also draw the voltage waveforms. Draw the circuit of a compensated attenuator and derive the conditions necessary for perfect attenuation. Mention the applications of an Attenuator. Show the circuit for the compensated attenuator and state the condition for perfect attenuation. Mention its applications Compute and draw to scale the output waveform for i)C=50pf ii)75pf iii) 25pf for an input of 20V step. Comment on each of the above cases.**

19. Consider the RC circuit that has a resistor and a capacitor connected in parallel. A current pulse of amplitude I=10A and a pulse width tp=0.05μs is applied to the circuit. Sketch the output waveform for the following values of lower cutoff frequency i) 20MHz ii)2MHz iii) 0.2MHz. 20. The pulse from a high voltage generator rises linearly for 0.05μs and then remains constant for 1μs. The rate of rise of the pulse is measured with an RC differentiating circuit whose tome constant is 250ps.If the positive output voltage from the differentiator has a maximum of 50V, what is the peak voltage of the generator. 21. A series generator of 50Ω impedance applies a 10V step of 2.2ηs rise time to series combination of a capacitor C and resistance R =50Ω. A pulse amplitudeof 1V appears across R. Find the value of the capacitance C.

UNIT 2NON1LINEAR WAVE SHAPING

2M Questions: 1. Draw the clipping circuit to clip the given input voltage 10 sin wt at +5V level. 2. Distinguish between clipping and clamping. 3. Why a clamping circuit is also called as dc restoration circuit. 4. What is the role of resistor across the diode in a clamping circuit? 5. Name the applications of voltage comparator. 6. Give short notes on transwitch triggering(2M -2012) 8M Questions: 1. Classify different types of clipper circuits. Give their circuits and explain their operation with the aid of transfer characteristics.(write about series and shunt clippers) 2. Draw a two level clipper circuit with i) diodes ii) Zener diodes. Explain its operation with the help of its transfer characteristics. 3. Draw a clipping circuit to clip the given input voltage 10 sinωt at +5V level. 4. Design a clipper circuit using diodes, resistors and batteries to give at the output a slice of the input waveform between +4V and 8V. 5. Design a circuit using ideal diode, reference voltage sources and resistances to simulate the transfer characteristics shown in fig.

8. The input voltage Vi to the two level clipper. As shown in fig. varies sinusoidal from 0 to 15v. Sketch the output voltage Vo.

9. Draw the diagram of an emitter coupled clipping circuit and draw its transfer characteristics indicating all intercepts, slopes and voltage levels. 10. Draw the +ve and –ve clamping circuits and explain the working principle with the help of neat waveforms. 11. State and prove clamping circuit theorem .what is its significance. Explain the steady state response of a practical clamping circuit to a square waveform. What are the different types of clamping circuits? Compare the practical clamping circuit with ideal clamping circuit. 12. Design a diode clamper circuit to clamp the positive peaks of the input signal to zero level. The frequency of the input signal is 500Hz. 13. A Symmetrical 10 kHz square wave of amplitude ±10V is impressed upon a diode clamping circuit as shown in fig1. Calculate and plot the output waveform under steady state conditions. Assume for the diode VBE=0V,Vf=100Ω and Vr= .

6. Draw the clipping circuit to give the transmission characteristics in fig.

14. Show that the double differentiator comparator pulse given by Vo=A has an amplitude 0.37 7. Sketch the output and input voltage waveforms for the circuit shown in fig

and a bandwidth at half maximum

of 2.4 RC and that the peak occurs at x=1. 15. The input voltage vi to the clipper circuit shown in a 1.0μsec pulse. Whose voltage varies between 0 and 10 V forward diode resistance Rf=100Ω and

=0.5V and Rr= . Sketch the output waveforms Vo and

indicate the time constants of the exponential portions. 16. State the effect of diode characteristics on clamping voltage. 17. a) explain the series clippers(9M-2012) b) Explain the emitter coupled clipper (5M –2012)

UNIT 3MULTIVIBRATORS 2M Questions: 1. Define storage time of a switch and state the measures to reduce it. 2. Draw the transistor switching circuit. 3. Define resolving time of binary. How is it going to influence the circuit operation? 4. What is the role of the commutating capacitors in a binary circuit? 5. Give two applications of Schmitt trigger. 8M Questions: 1. Explain how a BJT can be used a switch. Explain Turn-ON and TurnOFF times of the switching transistor with the help of relevant waveforms. Explain what is to be done to reduce the switching times of a transistor. Define the storage time of a BJT switch and state the measures to reduce it. Define rise time and fall time *** 2. With the help of a diagram, explain the working of a fixed bias transistor binary and derive the expression for stable state currents & voltages. 3. Explain various methods of improving switching speed and resolution of bistable multivibrator with necessary diagrams. 4. With the help of a circuit diagram and relevant waveforms, explain the operation of a Schmitt trigger (regenerative comparator). What do you mean by Hysteresis .Give two applications of Schmitt trigger? 5. Design a Schmitt trigger circuit using n-p-n si transistors to meet the following specifications: VCC=12V,UTP=4V,LTP=2V,hfe=60;IC2=3mA. Use relevant assumptions and the empherical relationships. 6. With the help of a circuit diagram and relevant waveforms, explain the operation of a collector coupled monostable multivibrator. Derive an expression for the maximum frequency of triggering. 7. Draw the collector coupled monostable multivibrator to produce a time delay of 100μs .Use transistors having hfe(min)=200,VCEsat0.2V,VBEsat=0.7V,VBEcuttoff=0V. Supply voltages of ±10V are available. Choose ICsat=2mA. Show the circuit with all component values and explain its operation with the help of waveforms seen at both the collectors and bases. 8. In a self biased monostable multivibrator VCC=15V, RC1=RC2=2KΩ,RE=500Ω,R1=R2=30KΩ,R=47Ω, C=0.03pf. Transistors are silicon type Determine i) Stable and quasi stable operating point voltage currents of the transistors. i) Minimum value of hfe with over drive factor of 4. Iii) Time delay iv) BV CEO of transistors

9. Design an astable multi with a repetition rate of the output waveform at 500Hz, and pulse width of 0.2msec. use BJTs with h fe=50, Vcc=VBB=20V.RL1=RL2=1KΩ 10. What is an astable multivibrator? Explain .how does this differ with the multivibrators? Derive the expression for the period of oscillations. Bring out the effect of supply voltages, junction voltages and temperature on the period of oscillations. 11. Design an astable multivibrator using BJTs having hfe(min)=80,VCEsat=0.2V. VBEsat=o.7V, VBE(cutoff)=0V Supply voltages of ±10V are available. Choose ICsat=2mA.the multivibrator has to produce a square wave at 10 KHz with40%duty cycle. Show the circuit diagram with all component values. Explain its operation with the waveforms seen at both the collectors and bases. 12. Design an astable multivibrator to generate a 10 kHz square wave with 10V peak. Two silicon transistors with hfe=30 are available. Use IC=10mA. 13. A silicon transistor operates at random temperature in common emitter configuration with Rc=k from a v collector supply. The transistor has hfe=50, rbb’=50, rce=80k, Rdc=4m. calculate the input impedance: (i) Just before the transistor enter saturation. (ii) Just after the transistor entering into saturation. (iii) When the emitter current in 1.1 times the saturation current? 14. Explain the principle of working of monostable multivibrator. (8M 2012) 15. Design a collector coupled monostable for the following specifications: Voltage drop across saturated transistors are negligible. for the transistors, hfe(min) =20 and the base emitter cutoff voltage for the normally OFF transistor is -1v. the base drive to the transistor in saturation is 50% in excess of minimum requied collector current= 2mA. the delay, time is 3000µs. choose R1=R2. find Rc,R,R1,C & V BB. (6M 2012) UNIT 4 TIME BASE GENERATORS 2M Questions: 1. Derive expressions for sweep speed error in Miller and Boot-Strap generators. 2. What is sweep voltage? What are the different methods of generating sweep waveforms? 3. What are the various methods liberalizing a sweep waveform? 4. Define sweep speed error es ,transmission et and seep deviation error ed and give their relationship.(errors in sweep circuits) 5. Explain the principle of operation of a Miller circuit.( 3M 2012) 8M Questions:

1. Sketch the characteristics of UJT & explain why it is called as negative resistance device? 2. Explain UJT sweep generator. (9M 2012) 3. Draw the circuit of a UJT relaxation oscillator and explain its operation with waveforms .Derive an expression for the frequency of the output waveform. 4. Design a sweep circuit using UJT with η=0.5, the sweep amplitude is 10V. The sweep duration 1ms, sweep speed error is 10%. Select the suitable values of VBB, VYY, R and C. 5. In the UJT sweep circuit, VBB=20v, VYY=50v, R=5KΩ, C=0.01μf. UJT has η=0.5.calulate i) Amplitude sweep signal ii) Slope and displacement error and iii) Estimated recovery time. 6. Design a UJT relaxation oscillator with the following specifications:trace time =200μs, output amplitude =5V, UJT has RBB=5KΩ,η=0.6 IV=2mA,IP=10μA and VV=1V. 7. The relaxation oscillator when running freely generates and output sweep amplitude of 100V and frequency 1 kHz, synchronizing pulses the breakdown voltage is lowered by 20V. Over what frequency range the synchronizing pulse frequency may be varied if 1:1synchronization is to result? 8. A UJT sweep operates with a valley voltage V V=3V and peak voltage VP=16V. A sinusoidal synchronizing voltage of 2V peak is applied between bases. The standoff ratio μ=0.5. if the natural frequency of the sweep is 1000Hz, over what range of synch-signal frequency will the sweep remain in 1:1 synchronism with the sync signal. 9. Explain how an exponential voltage waveform is linearalized using bootstrap and miller techniques (Explain the principle of operation of a miller and bootstrap circuits). Derive the expression for the slope error in each case. 10. Draw the circuit of Miller voltage sweep circuit and explain its operation with waveforms. Derive the expression for its sweep period, sweep amplitude and retrace interval. 11. Draw the circuit of Boot strap sweep generator Sketch the timing waveforms at various points in the circuits explain its operation with necessary analysis. 12. In a bootstrap technique of generating a linear voltage sweep waveform, state and justify whether the charging current is maintained constant? or time constant is increased? 13. If the amplifier gain is different from unity in a bootstrap, what is the effect of on sweep voltage? 14. Compare Miller & Bootstrap sweep circuits. (5M 2012) 15. What are the techniques used to improve the linearity of current sweeps? Illustrate with examples.

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Why miller sweep is preferred in CRO’s than Bootstrap sweep. What is the necessity and importance of current sweep circuits? In what respect a current seep differ from a voltage sweep Draw a constant current sweep circuit and explain its operation Draw the circuit diagram of a linear current sweep generator and explain its operation with waveforms. UNIT 5BLOCKING OSCILLATORS 2M Questions: 1. What is blocking oscillator. What is the use of blocking oscillator? List it applications 2. Explain base timing and emitter timing? Write the differences between them. 8M Questions: 1. Draw the circuit diagram of a triggered monostable blocking oscillator with base timing and explain its operation with waveforms. Derive an expression for its output pulse width. 2. A triggered blocking oscillator circuit shown, using a silicon transistor with Vcesat=0.3V, VBE(Sat)=0.7V and hFE=50. There are twice as many turns in the base winding as in the collector winding. The magnetizing inductance is 50μH, and its shunt capacitance is 100pF. During the pulse , Calculate i) the amplitude at the collector the collector current iC the base current and, pulse width. 3. Draw the circuit diagram of a free-running blocking oscillator and explain its operation. 4. Describe the principle of working of diode controlled astable blocking oscillator with the help of a circuit diagram and appropriate waveforms what are its disadvantages and how do you overcome them? b) In what respect a Blocking astable oscillator differs from an astable multivibrator 5. Explain triggererd transistor blocking oscillator(9m 2012) 6. explain about blocking oscillator rise time( 5M 2012) UNIT 6 SYNCHRONIZATION AND FREQUENCY DIVISION 8M Questions: 1. Give the importance of synchronization and frequency division. Or explain the principle of synchronization? How is it achieved in sweep circuit? Or With the help of waveforms explain the synchronization and frequency division using sweep circuits. 2. Explain the synchronization of sweep circuits with symmetrical signals. 3. How can an astable multivibrator be synchronized? Illustrate with waveforms. 4. Explain the method of pulse synchronization of relaxation devices with examples.

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Explain the principle of synchronization( 3M 2012) Explain synchronization of astable multivibrator. (9M 2012) give a short notes on phase delay & phase jitter(5M 2012) A symmetrical astable multi using silicon transistor operated from a collector supply voltage of 2V. The multi has a free period of 1000μsec. Are applied to one base through a small capacitor from a high impedance source. Calculate the minimum pulse amplitude. So that the multi period after synchronization is 750μsec. UNIT 7 LOGIC GATES 2M Questions: 1. Comparisons of logic families. 2. Define setup time and hold time of flip-flop. 8M Questions: 1. Compare the performance characteristics of TTL and CMOS logic families 2. Draw the CMOS NAND circuit and explain its logic operation with the help of tits transfer characteristic, what are the merits and demerits of CMOS gates? Compare the performance characteristics of TTL and ECL gates 3. Explain the following as referred to logic gates:*** i) Fan-in ii) Fan out iii) Noise margin iv) Open-collector outputs and v) Tristate logic 4. Draw the circuit diagram of a typical medium-speed TTL NAND gate. Explain the operation of the same. 5. With the help of a neat circuit diagram, explain the operation of a TTL NAND gate. Explain why TTL is fastest among saturated logic circuit. 6. Explain what do you understand by Fan-in and Fan-out of a logic gate. Describe a method to determine these for a TTL NAND gate with totem pole output. 7. Draw the circuit of CMOS NAND gate and implement the following input and output relation for using CMOS logic. 8. Draw the circuit of an ECL gate and explain its operation with the help of truth table. Compare its performance characteristics with TTL and CMOIS gates. Derive its i) logic levels and ii) Noise margin. what are its advantages 9. explain the following: TTL,CMOS,ECL (14M 2012) Write short notes on: 1. Ringing circuit.** 2. Attenuators 3. Diode switching times 4. Switching times of a transistor 5. Methods of Triggering a binary* 6. Schmitt trigger circuit

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UJT relaxation oscillator * Errors in sweep circuits* Linear current sweep generator Logic families. Flip flops.* Comparison of logic families Blocking Oscillator*. Fan-in, fan-out, noise margin, Open collector outputs & Tristate logic.

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Frequency division. Synchronization of sweep circuits with symmetrical signals.